Digital Logic Design - Lecture 2

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Digital Logic & Design

Faraz Hasan

Lecture 02
Logic Gates

 Basic Building Blocks


 Logic Gate Symbol
 Unique function
 Truth or Function Table
 Function Expression
 Timing Diagram
AND Gate

 1 output
 2 inputs
 3 inputs
 4 inputs 0 &
0

Multiple inputs
0

AND Gate function

 Logical Multiplication function

Input Output
F  A B
A B F
0 0 0 F  A  B  C  ....  N
0 1 0
1 0 0
1 1 1
AND Gate Timing Diagram

t0 t1 t2 t3 t4 t5 t6

F
OR Gate

 1 output
 2 inputs
 3 inputs
 4 inputs
 Multiple inputs 0 >=1
0
0
OR Gate function

 Boolean Add function

Input Output F  A B
A B F
0 0 0
0 1 1
F  A  B  C  ..  N
1 0 1
1 1 1
OR Gate Timing Diagram

t0 t1 t2 t3 t4 t5 t6

F
NOT Gate

 1 input
 1 output
NOT Gate function

 Invert function

Input Output
A F
0 1
1 0

FA
NOT Gate Timing Diagram

t0 t1 t2 t3 t4 t5 t6

F
AND Gate Applications

 Enable/Disable Device
 Counter counts when it receives pulses

Clock Pulses U/D


Counter

B1

A
Reset B8

Carry out

B ENB

Disable
Enable
OR Gate Applications

 Car door open alarm

Front left door


Rear left door
Alarm
Front right door
Rear right door
Alternate Representations
NAND Gate

 1 output
 2 inputs
 3 inputs
 4 inputs 0 &
0
0

 Multiple inputs
NAND Gate function
 NOT-AND function

Input Output
A B F F  A B
0 0 1 F  A  B  C  ....  N
0 1 1
1 0 1
1 1 0
NAND Gate Timing Diagram

t0 t1 t2 t3 t4 t5 t6

F
NAND Universal Gate

Input Output
A B F
0 0 1
0 1 1
1 0 1
1 1 0
NAND Universal Gate

Input Output Output


A B F1 F
0 0 1 0
0 1 1 0
1 2
1 0 1 0
1 1 0 1
NAND Universal Gate

Input Output
A B F
0 0 0
0 1 1 1
1 0 1 3
2
1 1 1
NOR Gate

 1 output
 2 inputs
 3 inputs
 4 inputs 0 >=1
0
0

 Multiple inputs
NOR Gate function

 NOT-OR function

Input Output
A B F F  A B
0 0 1 F  A  B  C  ....  N
0 1 0
1 0 0
1 1 0
NOR Gate Timing Diagram

t0 t1 t2 t3 t4 t5 t6
NOR Universal Gate

Input Output
A B F
0 0 0
0 1 1
1 2
1 0 1
1 1 1
NOR Universal Gate

Input Output
A B F
0 0 0
1
0 1 0 3
1 0 0 2
1 1 1
NAND-NOR Universal Gate

1 1
3 4 3 4
2 2
NAND Gate Applications
 Device Failure Alarm

ALARM
NOR Gate Applications
 Washing Machine Controller

Switch
XOR Gate
 1 output
 2 inputs
 Multiple inputs
0 =1
0
0
XOR Gate function

Input Output
F  A B
A B F
0 0 0
0 1 1
1 0 1
1 1 0
XOR Gate Timing Diagram

t0 t1 t2 t3 t4 t5 t6
XNOR Gate
 1 output
 2 inputs
 Multiple inputs
0 =
0
0
XNOR Gate function

Input Output
A B F F  A B
0 0 1
0 1 0
1 0 0
1 1 1
XNOR Gate Timing Diagram

t0 t1 t2 t3 t4 t5 t6
TTL/CMOS NOT Gate

+VCC +VDD
P-Type
MOSFET

Vi/p Vo/p
Vo/p
+V
Vi/p NPN
Transistor N-Type
MOSFET
Logic Gate Integrated Circuits
14 13 12 11 10 9 8 14 13 12 11 10 9 8

1 2 3 4 5 6 7 1 2 3 4 5 6 7
7408 7432
Four 2-Input AND Gate Four 2-Input OR Gate

14 13 12 11 10 9 8 14 13 12 11 10 9 8

1 2 3 4 5 6 7 1 2 3 4 5 6 7
7404 7400
Hex Inverters Four 2-Input NAND Gate
Logic Gate Integrated Circuits
14 13 12 11 10 9 8

1 2 3 4 5 6 7
7402
Four 2-Input NOR Gate  
14 13 12 11 10 9 8 14 13 12 11 10 9 8

1 2 3 4 5 6 7 1 2 3 4 5 6 7
7486 74266
Four 2-Input XOR Gate Four 2-Input XNOR Gate
Boolean Addition & Multiplication
■ Boolean Addition performed by OR gate
■ Sum Term describes Boolean Addition

■ Boolean Multiplication performed by AND gate


■ Product Term describes Boolean Multiplication
Boolean Addition

■ Sum of literals

■ Sum term = 1 if any literal = 1


■ Sum term = 0 if all literals = 0
Boolean Multiplication
■ Product of literals

■ Product term = 1 if all literals = 1


■ Product term = 0 if any one literal = 0
Laws, Rules & Theorems of Boolean
Algebra
■ Commutative Law
for addition and multiplication
■ Associative Law
for addition and multiplication
■ Distributive Law
■ Rules of Boolean Algebra
■ Demorgan’s Theorems
Commutative Law
■ Commutative Law for Addition
A+B=B+A

■ Commutative Law for Multiplication


A.B = B.A
Associative Law
■ Associative Law for Addition
A + (B + C) = (A + B) + C
Associative Law
■ Associative Law for Multiplication
A.(B.C) = (A.B).C
Distributive Law
A.(B + C) = A.B + A.C
Rules of Boolean Algebra

1. A+0=A 7. A.A = A
2. A+1=1 8. A. =0
3. A.0 = 0 9. =A
4. A.1 = A 10. A + A.B = A

5. A+A=A 11. A + =A+B


6. A+ =1 12. (A+B).(A+C)

= A+B.C
Demorgan’s Theorems
■ First Theorem

■ Second Theorem
Demorgan’s Theorems
■ Any number of variables

■ Combination of variables
Boolean Analysis of Logic Circuits
■ Boolean Algebra provides concise way to
represent operation of a logic circuit
■ Complete function of a logic circuit can be
determined by evaluating the Boolean
expression using different input combinations
Boolean Analysis of Logic Circuits

■ From the expression, the output is a 1 if


variable D = 1 and =1
■ =1 if AB=1 or C=0
Boolean Analysis of Logic Circuits
Inputs Outp Inputs Outp
ut ut
A B C D F A B C D F
0 0 0 0 0 1 0 0 0 0
0 0 0 1 1 1 0 0 1 1
0 0 1 0 0 1 0 1 0 0
0 0 1 1 0 1 0 1 1 0
0 1 0 0 0 1 1 0 0 0
0 1 0 1 1 1 1 0 1 1
0 1 1 0 0 1 1 1 0 0
0 1 1 1 0 1 1 1 1 1
Simplification using Boolean
Algebra
Simplification using Boolean
Algebra
■ AB + A(B+C) + B(B+C)
= AB + AB + AC + BB +BC
= AB + AC + B + BC
= AB + AC + B
= B + AC
Simplified Circuit
Standard forms of Boolean
Expressions
■ Sum-of-Products form
■ Product-of-Sums form
Standard forms of Boolean
Expressions
■ Sum-of-Products form
AB + ABC
ABC + CDE +

■ Product-of-Sums form
Implementation of SOP expression
Implementation of POS expression
Conversion of general expression to
SOP form

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