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William Stallings Computer Organization and Architecture 10 Edition
William Stallings Computer Organization and Architecture 10 Edition
William Stallings
Computer Organization
and Architecture
10th Edition
Architectural
Computer
attributes
Architecture
include:
Organizational
Computer
attributes
Organization
include:
Hierarchical system
Structure
Set of interrelated subsystems
The way in which components
Hierarchical nature of complex relate to each other
systems is essential to both their
Function
design and their description
The operation of individual
Designer need only deal with a components as part of the
particular level of the system at a structure
time
Concerned with structure and
function at each level
I/O Main
memory
System
Bus
CPU
CPU
Registers ALU
Structure Internal
Bus
Control
Unit
CONTROL
UNIT
Sequencing
Logic
Control Unit
Registers and
Decoders
Control
Memory
Registers
Provide storage internal to the CPU
CPU Interconnection
Some mechanism that provides for
communication among the control unit,
ALU, and registers
Core
An individual processing unit on a processor chip
May be equivalent in functionality to a CPU on a single-CPU system
Specialized processing units are also referred to as cores
Processor
A physical piece of silicon containing one or more cores
Is the computer component that interprets and executes instructions
Referred to as a multicore processor if it contains multiple cores
Processor
I/O chips chip
PROCESSOR CHIP
L3 cache L3 cache
CORE
Arithmetic
Instruction and logic Load/
logic unit (ALU) store logic
L2 instruction L2 data
cache cache
Figure 1.3
Motherboard with Two Intel Quad-Core Xeon Processors
zEnterprise EC12
Processor Unit
(PU)
Chip Diagram
zEnterprise
EC12
Core Layout
AC MQ
Input-
Arithmetic-logic output
circuits
equipment
(I, O)
MBR
Instructions
and data
Instructions
and data
M(0)
M(1)
M(2)
M(3) PC IBR
M(4) AC: Accumulator register
MQ: multiply-quotient register
MBR: memory buffer register
IBR: instruction buffer register
MAR IR PC: program counter
MAR: memory address register
Main
IR: insruction register
memory
(M)
Control
Control
circuits
signals
M(4092)
M(4093)
M(4095)
Program control unit (CC)
Addresses
0 8 20 28 39
opcode (8 bits) address (12 bits) opcode (8 bits) address (12 bits)
Memory address register • Specifies the address in memory of the word to be written from or read
(MAR) into the MBR
Instruction register (IR) • Contains the 8-bit opcode instruction being executed
Instruction buffer register • Employed to temporarily hold the right-hand instruction from a word in
(IBR) memory
Accumulator (AC) and • Employed to temporarily hold operands and results of ALU operations
multiplier quotient (MQ)
Yes Is next No
instruction MAR PC
No memory in IBR?
Fetch access
cycle required
MBR M(MAR)
Left
No Yes IBR MBR (20:39)
IR IBR (0:7) IR MBR (20:27) instruction
IR MBR (0:7)
MAR IBR (8:19) MAR MBR (28:39) required?
MAR MBR (8:19)
PC PC + 1
Decode instruction in IR
Execution Yes
Is AC > 0?
cycle
AC MBR AC AC + MBR
Table 1.1
branch 00001110 JUMP M(X,20:39) Take next instruction from right half of M(X)
00001111 JUMP+ M(X,0:19) If number in the accumulator is nonnegative,
take next instruction from left half of M(X)
0 JU If number in the
0 MP accumulator is nonnegative,
Conditional branch 0 + take next instruction from
The IAS
1 M(X right half of M(X)
0 ,20:
0 39)
0
00000101
0
ADD M(X) Add M(X) to AC; put the result in AC
Instruction Set
00000111 ADD |M(X)| Add |M(X)| to AC; put the result in AC
00000110 SUB M(X) Subtract M(X) from AC; put the result in AC
00001000 SUB |M(X)| Subtract |M(X)| from AC; put the remainder
in AC
00001011 MUL M(X) Multiply M(X) by MQ; put most significant
bits of result in AC, put least significant bits
Arithmetic
in MQ
00001100 DIV M(X) Divide AC by M(X); put the quotient in MQ
and the remainder in AC
00010100 LSH Multiply accumulator by 2; i.e., shift left one
bit position
00010101 RSH Divide accumulator by 2; i.e., shift right one
position
00010010 STOR M(X,8:19) Replace left address field at M(X) by 12
rightmost bits of AC
Address modify
00010011 STOR M(X,28:39) Replace right address field at M(X) by 12
rightmost bits of AC (Table can be found on page 17 in the textbook.)
Cheaper
It was not until the late 1950’s that fully transistorized computers
were commercially available
Introduced:
More complex arithmetic and logic units and control
units
The use of high-level programming languages
Provision of system software which provided the ability
to:
Load programs
Move data to peripherals
Libraries perform common computations
Mag tape
units
CPU
Card
punch
Data
channel Line
printer
Card
reader
Drum
Multi- Data
plexor channel
Disk
Data
Disk
channel
Hyper-
tapes
Discrete component
Single, self-contained transistor
Manufactured separately, packaged in their own containers, and soldered
or wired together onto masonite-like circuit boards
Manufacturing process was expensive and cumbersome
The two most important members of the third generation were the
IBM System/360 and the DEC PDP-8
Read
Activate Write
signal
Chip
Gate
Packaged
chip
Fi g u r e 1 .1 2 Gro w t h i n Tra n s i s t o r Co u n t o n I n t e g r a t e d Ci r c u i t s
( D R AM m e m o r y )
Announced in 1964
Increasing number
Increasing speed
of I/O ports
Increasing memory
Increasing cost
size
Omnibus
Generations
VLSI
Very Large
Scale
Integration
ULSI
Semiconductor Memory Ultra Large
Microprocessors Scale
Integration
In 1974 the price per bit of semiconductor memory dropped below the price per bit of core
memory
There has been a continuing and rapid decline in memory cost
Developments in memory and processor technologies
accompanied by a corresponding increase in physical memory
changed the nature of computers in less than a decade
density
Each generation has provided four times the storage density of the previous generation, accompanied by declining cost per bit
and declining access time
Pentium Pro
• Continued the move into superscalar organization with aggressive use of register renaming, branch prediction, data flow
analysis, and speculative execution
Pentium II
• Incorporated Intel MMX technology, which is designed specifically to process video, audio, and graphics data efficiently
Pentium III
• Incorporated additional floating-point instructions
• Streaming SIMD Extensions (SSE)
Pentium 4
• Includes additional floating-point and other enhancements for multimedia
Core
• First Intel x86 micro-core
Core 2
• Extends the Core architecture to 64 bits
• Core 2 Quad provides four cores on a single chip
• More recent Core offerings have up to 10 cores per chip
• An important addition to the architecture was the Advanced Vector Extensions instruction set
Processor Memory
Human Diagnostic
interface port
A/D D/A
conversion Conversion
Actuators/
Sensors
indicators
It is the fourth generation that is usually thought of as the IoT and it is marked by the use of
billions of embedded devices
Has a processor whose behavior is difficult to observe both by the programmer and
the user
Is not programmable once the program logic for the device has been burned into
ROM
Chips are high-speed processors that are known for their small die
size and low power requirements
Cortex-M
• Cortex-M0
Cortex-R • Cortex-M0+
• Cortex-M3
Cortex- • Cortex-M4
A/Cortex-A50
P e rip h e ra l b u s
3 2 -b it b u s
Microcontroller Chip
IC o d e SR A M &
in te rfa c e p e rip h e ra l I/F
B u s m a trix
D e b u g lo g ic
M e m o ry
D A P p ro te c tio n u n it
A R M
N V IC co re ETM
Cortex-M3 Core
N V IC ETM Cortex-M3
in te rfa c e in te rfa c e
Processor
3 2 -b it A L U
H a rd w a re 3 2 -b it
d iv id e r m u ltip lie r
C o n tro l Thum b
lo g ic decode
In s tru c tio n D a ta
in te rfa c e in te rfa c e
The individual or company only needs to pay for the storage capacity
and services they need
The collection of network capabilities required to access a cloud, including making use
of specialized services over the Internet, linking enterprise data center to a cloud, and
using firewalls and other network security devices at critical points to enforce access
security policies
Cloud Storage
Subset of cloud computing
Consists of database storage and database applications hosted remotely on cloud servers
Enables small businesses and individual users to take advantage of data storage that
scales with their needs and to take advantage of a variety of database applications
without having to buy, maintain, and manage the storage assets