COA

Computer Functions
 Computer Functions - Group 2

Topics- Group Members-

❏ Instructions Fetching & Execution ● Nikola Gligorovski (Leader)

❏ Interrupts ● Zulkarnine Mohammed Shahla
❏ I/O Functions ● Tadesse Masresha Abel
● Christofer Gabriel Pinhiero

I/O
Functions
What to expect from the presentation? CPU
➔ Moderate knowledge about how the computer
functions in light of the topics mentioned above.
Memory Interrupt
Brief Introduction To
Instruction and Execution
CPU
There are 2 steps in instruction processing:
Instruction
1. The processor reads instructions from Memory
memory one at a time. (Fetch)

2. The processor executes the instruction

read from the memory.
Execute

CPU

Process
Simple Structure of CPU and Memory

CPU
Memory

0
Instruction 1 MBR
MAR I/O AR I/O BR
1
Instruction 2

Instruction 3 2 IR
Execution
3
PC unit
Data 1

Data 2 4

Data 3 5
PC - Program Counter MAR - Memory Address

IR - Instruction Register Register

n-1
Data
I/O AR - Input/output Address MBR - Memory Buffer Register
n is the size of memory
Register
INTERRUPTS AND THE INSTRUCTION CYCLE

● A simple explanation of interrupts would be, an interrupt is a signal sent to

the processor that interrupts the current process occurring in the processor.
● An instruction cycle is the basic operation cycle of a computer. It is the
process by which a computer retrieves a program instruction from its
memory, determines what actions the instruction requires, and carries out
those actions. This cycle is repeated continuously by the central processing
unit (CPU), from boot upto when the computer is shut down.
● An interrupt is just that:an interruption of the normal sequence of execution.
Interrupt cycle

● Added to instruction cycle

● Processor checks for interrupt – Indicated by an interrupt signal
● If no interrupt, fetch next instruction
➢ If interrupt pending:
❏ Suspend execution of current program
❏ Save context (what does this mean?)
❏ Set PC to start address of interrupt handler routine
❏ Process interrupt, i.e. execute interrupt handler code
❏ Restore context and continue interrupted program
Interrupt cycle and instruction cycle
Instruction Cycle State Diagram,with Interrupts
Multiple interrupts

● Two approaches can be taken to dealing with multiple interrupts.

● The first is to disable interrupts while an interrupt is being processed. A
disabled interrupt simply means that the processor can and will ignore that
interrupt request signal.If an interrupt occurs during this time,it generally
remains pending and will be checked by the processor after the processor
has enabled interrupts.Thus,when a user program is executing and an
interrupt occurs,interrupts are disabled immediately.After the interrupt
handler routine completes,interrupts are enabled before resuming the user
program, and the processor checks to see if additional interrupts have
occurred.This approach is nice and simple,as interrupts are handled in strict
sequential order
● A second approach is to define priorities for interrupts and to allow an
interrupt of higher priority to cause a lower-priority interrupt handler to be
itself interrupted .
Multiple interrupts
• Disable interrupts – Sequential Processing

– Processor will ignore further interrupts whilst processing one interrupt

– Interrupts remain pending and are checked after first interrupt has been
processed

– Interrupts handled in sequence as they occur

• Define priorities

– Nested Processing

– Low priority interrupts can be interrupted by higher priority interrupts

– When higher priority interrupt has been processed, processor returns to

previous interrupt