Instruction Format

Instruction Format
• An instruction format defines the layout of the bits of an
instruction, in terms of its constituents parts.
• An instruction format must include an opcode and, implicitly
or explicitly, zero or more operands.
• Each explicit operand is referenced using one of the addressing
mode that is available for that machine.
• The format must, implicitly or explictly, indicate the addressing
mode of each operand.
• For most instruction sets, more than one instruction format is
used.
• Four common instruction format are shown in the Figure 1.
Instruction Formats

Figure 1: Four common Instruction formats

 Instruction Format
• In one address instruction format, a second address must be
implicit for a binary operation.
• For implicit reference, a processor register is used and it is
termed as accumulator(AC). the accumulator contains one of
the operands and is used to store the result.
• Consider a simple arithmetic expression to evaluate:
Y= (A + B) / (C * D)
• The evaluation of this expression in three address instruction
format, two address instruction format and one address
instruction format is shown in the Figure 2, Figure 3 and
Figure 4 respectively.
Instruction Addressing-Three
Address Instruction

Figure : 2Three address instructions

Instruction Addressing- Two
Address Instruction  

Figure 3: Two address instructions

Instruction Addressing-One
Address Instruction  

Figure 4: One address instructions

 Instruction Addressing-Zero
Address Instruction
• A stack-organized computer does not use an
address field for the instructions ADD and MUL.
• The PUSH and POP instructions, however, need
an address field to specify the operand that
communicates with the stack.
• The following program shows how
X = (A + B) ∗ (C + D) will be written for a stack
organized computer. (TOS stands for top of stack)
 Instruction Addressing-Zero
Address Instruction
• PUSH A TOS ← A
• PUSH B TOS ← B
• ADD TOS ← (A + B)
• PUSH C TOS ← C
• PUSH D TOS ← D
• ADD TOS ← (C + D)
• MUL TOS ← (C + D) ∗ (A + B)
• POP X M [X] ← TOS

To evaluate arithmetic expressions in a stack computer, it is

necessary to convert the expression into reverse Polish notation.
The name “zero-address” is given to this type of computer because
of the absence of an address field in the computational instructions.
 Instruction Addressing-Zero Address
Instruction
• Example: Stack operation to evaluate 3*4+5*6
• => 34*56*+ (in in reverse Polish notation )
3-Address
Evaluate a = (b+c)*d - e
add a, b, c ab+c
mul a, a, d aa*d
push b
sub a, a, e aa-e
2-Address push c
Mov a, b ab add
add a, c aa+c 0-Address push d
mul a, d aa*d mpy
sub a, e aa-e push e
1-Address sub
load b Accb pop a
add c AccAcc+c
mpy d AccAcc*d
sub e AccAcc-e
store a aAcc
• Assume,
– Size of memory address is 3bytes
– Size of operand is 3bytes
– Size of a memory location is 1byte
– Size of opcode is 1byte
Then,

Evaluate X=(A+B) * (C+D)

• Evaluate X=(a/b+c*d)/(d*e-f+c/a)+g

• Evaluate Y=(A-B)/[C+(D/E)]
Problem
 Assumptions
24-bit memory address (3 bytes)
128 instructions (7 bits rounded to 1 byte)
 Memory
24 Bits / 3 Bytes
4- Address
8
Instruction
24 24 24 24
Op
Op Code
Code ResAddr
ResAddr Op1Addr
Op1Addr Op2Addr
Op2Addr NextiAddr
NextiAddr
CPU

Op1 Example: add M1,M2,M3, nexti

M(1)M(2)+M(3)
Op2 +
Resop
Memory Required to store an Instruction:
5 x 3 bytes = 15 Bytes

Calculation of Memory Accesses:

To fetch Instruction itself To Execute an Instruction
Opcode=1
Op1Addr=1 Op1=1
Op2Addr=1 Op2=1
ResAddr=1 Res=1
NextiAddr=1 Total=3
Total=5

Total Memory Traffic= No. of M/A to fetch + No. of M/A to Execute

Total Memory Traffic= 5 + 3 =8
 Memory
24 Bits / 3 Bytes
3- Address
8
Instruction
24 24 24
Op
Op Code
Code ResAddr
ResAddr Op1Addr
Op1Addr Op2Addr
Op2Addr
CPU

Op1 Example: add M1,M2,M3

M(1)M(2)+M(3)
Op2 + Memory Required to store an Instruction:
Resop 4 x 3 bytes = 12 Bytes

PC 24
Calculation of Memory Accesses:
To fetch Instruction itself To Execute an Instruction
Opcode=1
Op1Addr=1 Op1=1
Op2Addr=1 Op2=1
ResAddr=1 Res=1
Total=4 Total=3

Total Memory Traffic= No. of M/A to fetch + No. of M/A to Execute

Total Memory Traffic= 4+ 3 =7
 Memory
24 Bits / 3 Bytes
2- Address
8
Instruction
24 24 24
Op
Op Code
Code Op1Addr
Op1Addr Op2Addr
Op2Addr
CPU
Example: add M2,M3
Op1
M(2)M(2)+M(3)
Op2 + Memory Required to store an Instruction:
Resop 3 x 3 bytes = 09 Bytes

PC 24
Calculation of Memory Accesses:
To fetch Instruction itself To Execute an Instruction
Opcode=1
Op1Addr=1 Op1=1
Op2Addr=1 Op2=1
Res=1
Total=3
Total=3

Total Memory Traffic= No. of M/A to fetch + No. of M/A to Execute

Total Memory Traffic= 3+ 3 =6
 Memory
24 Bits / 3 Bytes
1- Address
8
Instruction
24 24
Op
Op Code
Code Op1Addr
Op1Addr
CPU

Op1 Example: add M2

Op2 + Memory Required to store an Instruction:
Resop 2 x 3 bytes = 06 Bytes
Acc

PC 24
Calculation of Memory Accesses:
To fetch Instruction itself To Execute an Instruction
Opcode=1
Op1Addr=1 Op1=1
Total=2 Total=1

Total Memory Traffic= No. of M/A to fetch + No. of M/A to Execute

Total Memory Traffic= 2+ 1 =3
0-Address Instruction
 Comparisons
Instruction Memory Memory M/As to M/As to Memory
Type To Store To Encode fetch an Execute an Traffic
in Bytes in Bytes Instruction Instruction

4-address 5 x 3 = 15 1+(4 x 3) = 13 5 3 5+3=8

3-Address 4 x 3 = 12 1+(3 x 3) = 10 4 3 4+3=7

2-Address 3 x 3 = 09 1+(2 x 3) = 07 3 3 3+3=6

1-Address 2 x 3 = 06 1+(1 x 3) = 04 2 1 2+1=3

0-Address 1 x 3 = 03 1+(0 x 3) = 01 1 0 1+0=1