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Ch 1.

Amplifiers
Ideal OP Amps
Basic OP Amp Circuit Blocks
Analog Computation
Nonlinear OP Amp Applications
OP Amp Considerations
Guarding
Passive Filters
Active Filters
VCO(Voltage Controlled Oscillator)
Function of Amplifiers

Amplifiers provides
 GAIN
 Filtering, Signal processing, Correction for
Nonlinearities

Temperature
Pressure Signal
Flow
Conditioning Digital
Motion Sensor
Circuitry Computer
….

Chap 0 2
Ideal OP Amps

Transfer Function = Output / Input
 Voltage Amp TF (Gain): Av 
vo
vi
 Usually Av  1
 OP Amp is preferred
 Easy to use in circuit designed compared to
discrete Transistor circuits

Chap 0 3
Ideal OP Amps (Cont.)

Assumptions
 Open loop Gain = Infinity
 Input Impedance Rd = Infinity
 Output Impedance Ro = 0
 Bandwidth = Infinity
 Infinite Frequency Response
 vo=0 when v1 = v2
 No Offset Voltage

Chap 0 4
Ideal OP Amps (Cont.)

Note
 v0 = A(v2 – v1)
 If v0 = , A =  (Typically 100,000)
• Then v2 – v1 = 0  v2 = v1
 Since v2 = v1 and Rd = 
• We can neglect the current in Rd

Rule 1
 When the OP Amp is in linear range the two inputs are
at the same voltage

Rule 2
 No Current flows into either terminal of the OP Amp

Chap 0 5
Basic OP Amp Circuit Blocks

Inverting Amplifier

Noninverting Amplifier

Unity-Gain Amplifier

Differential Amplifier

Instrumental Amplifier

The Electrocardiogram Amplifier

Chap 0 6
Inverting Amplifier

Inverting Amp with 
From Rule 1
Gain = - Rf / Ri  v- = v+ = 0

From Rule 2 & KCL
 ii + if = 0  ii = -if
 From Ohm’s law
 ii = vi / Ri , , if = vo / Rf
 v i / Ri = - v o / Rf
 vo / vi = -Rf / Ri

Inverting Amp Gain
Virtual Ground
 -Rf / Ri

Chap 0 7
Inverting Amplifier (Cont.)

Linear Range 
Input Impedance
 By Power Supply  Low (Ri)
Voltage  Increasing Ri 
Decreasing Gain
 Increasing Gain by
increasing Rf
• But there is practical
limit

Saturation
Chap 0 8
Why High Input Impedance ?

Concept of Loading
 계측기가 Sensor 의 출력에

Open Loop Output
영향을 주고 싶지 않음  Vx
 Sensor 의 출력이 amplitude 
Voltage Drop by Load
인 경우에만 중요함 .  Vy = Vx –
Frequency 혹은 Digital
Vx  Rx / (RL + Rx)
출력인 경우에는 영향 없음

Let RL >> Rx
 Vy = Vx
Rx  Amp 혹은 계측기의
x 영향을 제거할 수 있음
Vx Vy RL

Chap 0 9
Noninverting Amplifiers

Noninverting Amp 
By Rule 2
 Gain = (Rf + Ri) / Rf  Vo = If  (Rf + Ri)
 Vi = If  Ri
 Vo = Vi  (Rf + Ri)/Ri

Gain: Vo/Vi = 1 + Rf / Ri

Gain  1, Always

Input Impedance
 Very Large (Infinite)
By Rule 1
Vi

Chap 0 10
Unity-Gain Amplifier

Homework #2-1 
Vo = Vi
 Verify that the Gain of 
Applications
Unity-Gain Amp is 1  Buffer amplifier
 Isolate one circuit from
the loading effects of a
following stage
 Impedance converter
 Data conversion System
(ADC or DAC) where
constant impedance or
high impedance is
required

Chap 0 11
Differential Amplifiers

Combination of Inverting and Noninverting Amp

Can reject 60Hz interference

Electrocardiogram amplifier

Differential Noninverting
Chap 0
Instrumentation 12
Differential Amplifiers (Cont.)

Gain of Differential Amp
 By Rule 2
 V5 = I2 * R2
 V2 = I2 * R1 + V5 = V5 * R1 /R2
+ V5
 V5 = R2 * V2 / (R1 + R2)
 By Rule 1
 V1 = R1 * I1 + V5
 V5 = R2 * I1 + V6
 V6 = (V2 – V1) * R2 / R1

Chap 0 13
Differential Amplifiers (Cont.)

CMV (Common Mode Voltage)
 If V1 = V2, then V6 = 0

CMG (Common Mode Gain) = 0

DG(Differential voltage Gain)
 If V1  V2, then V6 = (V2-V1)*(R2/R1)

In practice, CMG  0

CMRR (Common Mode Rejection Ratio)
 Measure of the ability to reject CMV
 CMRR = DG / CMG
 The Higher CMRR, the better quality
 Typically, 100 ~ 10,000
 60Hz noise common to V1 and V2 can be rejected

Chap 0 14
Instrumentation Amplifiers

One OP Amp Differential Amplifier
 Input Impedance is not so High
 Good for Low impedance source
• Strain gage Bridge
 Bad for High impedance source

Instrumentation Amplifier
 Differential Amp with High Input Impedance
and Low Output Impedance
 Two Noninvering Amp + One Differential Amp

Chap 0 15
Instrumentation Amplifiers (Cont.)

Instrumentation Amp = 
Homework #2-2
Noninverting Amp +  Show that
Differential Amp  DG = (V1-V2) / (V3-V4)
= (2*R4 + R3) / R3
 V6 = (V3-V4)*DG*R2 / R1

First Stage CMRR
 CMRR = DG / CMG = DG

Overall CMG = 0
 High CMRR

High Input Impedance

Gain is adjustable by changing
R3

Chap 0 16
The Electrocardiogram Amplifier
Low Pass Filter
< 100Hz
< 0.2 V
Gain = 40

Gain = 32

High Pass Filter


Maximize CMRR >0.05Hz
Chap 0 17
Analog Computation

Digital Signal Processing is preferred
 Flexibility
 Easy to Change
 Elimination of hardware

Analog Signal Processing
 Is preferred when DSP consumes too much
time

Chap 0 18
Inverter and Scale Changer

Inverting Amp with 
Inverter
Gain = - Rf / Ri  Rf / Ri = 1

Inverter and Scale
Changer
 Proper choice of Rf / Ri

Application
 Use of inverter to scale
the output of DAC

Chap 0 19
Adders (Summing Amplifiers)

Adder 
Vo = -Rf(V1/R1 + V2/R2
 Inverter with Several +… + Vn/Rn)
inputs  If = I1 + I2 + In
 I1 = V1/R1, …
 Vo = -If * Rf

Rf determines overall
Gain

Ri determines
weighting factor and
input impedance

Chap 0 20
Integrator

Homework #2-3 
Drawbacks
 Show that  Vo will reach saturation
1 t1 voltage, if Vi is left
v0 
RC 0
vi dt  vic connected indefinitely
 Integrator operates as
an open-loop amplifier
for DC inputs

Chap 0 21
Practical Integrator


Reset
 S1 Closed, S0 Open
 Inverter
 C is initialized to Vr

Integrate
Controlled By  S1 Open, S0 Closed
Relay or 
Hold
Solid State Switch or  S1 Open, S0 Open
Analog Switch  Keeps Vo constant
 Read and Process

Chap 0 22
Differentiators

Homework #2-4 
Drawbacks
 Show that  Instability at High
dvi frequencies
v0   RC
dt 
Practical Differentiator
 To Stable R
Ri 
A0 0 C

Chap 0 23
Comparators

Compare Two Inputs 
Drawbacks
 Vi > Vr  If Vi = Vr + small noise
 Vo = -Vs  Rapid fluctuation
 Vi < Vr between  Vs
 Vo = Vs

Chap 0 24
Comparators with Hysteresis

Positive Feedback 
Homework #2-5
 Hysteresis loop  Show that
 Can remove the effect (VS  Vr ) R1
Vr  Vr  Vr 
of Small Noise R1  R2
 Reduce Fluctuation (VS  Vr ) R1
Vr  Vr  Vr 
R1  R2

Chap 0 25
Rectifiers

Precision Half
Wave Rectifier


Precision Full
Wave Rectifier


Limiters

Chap 0 26
OP Amp Considerations

Effects of Nonlinear characteristics
 Compensation
 Undesirable Oscillation at High frequency
• Add external Capacitance according to Spec sheet
 GBW (Gain Bandwidth Product)
 Gain  Bandwidth = Constant (Typically 1MHz)
• For Noninverting Amp: Bandwidth = GBW / Gain
 Input Offset Voltage
 Practical OP Amp
• Zero input Does NOT give Zero output
 Input Offset Voltage
• Applied input voltage to obtain Zero output
 Nulling the offset Voltage
• Adding External Resister according to Spec sheet

Chap 0 27
OP Amp Considerations (Cont.)
 Input Bias Current
 Practical OP amp
• Current flowing into the terminal is NOT Zero
• To keep the input Tr of OP amp turned on
• Causes errors proportional to feedback network R
 To minimize errors
• feedback R should be low (<10K)
 Slew Rate
 Maximal rate of change of amplifier output voltage
• Ex: Slew rate of 741 = 0.5 V / s
– Time to output change from –5V to 5V = 20 s
 To Minimize slew rate problem
• Use OP amp with smaller external compensating C

Chap 0 28
OP Amp Considerations (Cont.)
 Power Supply
 Usually 15V
• Linear Range 13V
 Reducing power supply voltage
• Results reduced linear range
• Device does not work < 4V
 Different OP Amps
 Bipolar Op Amps
• Good input offset stability
• Moderate input bias current and Input resistances
 FET
• Very Low input bias current and Very High Input resistances
• Poor Input offset voltage stability

Chap 0 29
OP Amp Considerations (Cont.)

Common OP amps, Typical Specifications
 1986 Prices

Chap 0 30
Guarding

Elimination of Surface Leakage Currents

Elimination of Common Mode Signals


Very important in practice
 But skip in this course

Chap 0 31
Passive Filters

Passive Circuits
 Contains only passive elements
 Registers, Capacitors and Inductors
 Examples
 Bridge Circuit
 Voltage Divider
 Filters

Filters
 Eliminate unwanted signal from the loop
 Low Pass, High Pass, Band Pass, Notch, …

Chap 0 32
Passive first-order Low pass Filter

Pass desired Audio 
Homework #2-6
signal and reject  Show that
undesired RF Vo 1
 ,   RC

Order of Filter Vi 1  j
 Number of C and L  Plot Magnitude and
Phase plot (Bode plot)
 Meaning of C

Chap 0 33
Passive first-order High pass Filter

Pass desired High 
Homework #2-7
frequency signal and  Show that
reject undesired low Vo j
 ,   RC
frequency signal Vi 1  j
 Plot Magnitude and
Phase plot (Bode plot)
 Meaning of C

Chap 0 34
Passive second-order Low pass Filter

To increase the 
Homework #2-8
attenuation of transfer  Show that
function Vo 1

Vi ( j /  c ) 2  (2 j /  c )  1

Order of Filter
1 R C
 Number of C and L c  , 
LC 2 L
 Meaning of Quality factor
1 
Q  c ,   3dB BW
2 

 1

 1
 1

Chap 0 35
Passive second-order High pass Filter

To increase the 
Homework #2-9
attenuation of transfer  Show that
function Vo

2
Vi ( j /  c ) 2  (2 j /  c )  1

Order of Filter
1 R C
 Number of C and L c  , 
LC 2 L

 1

 1
 1

Chap 0 36
Active First-order Low Pass Filter

Inverting Amp + 
Identical frequency
Feedback Capacitor response with Passive
filter

Very Low Output
impedance
 Negligible Loading
Effect

Chap 0 37
Active First-order High Pass Filter

Inverting Amp + Input 
Identical frequency
Capacitor response with Passive
filter

Very Low Output
impedance
 Negligible Loading
Effect

Chap 0 38
Active High-order Filters

Low Pass Filters


High Pass Filters

Chap 0 39
Bandpass and Band-reject Filters

Butterworth Filters
 Maximally Flat Magnitude response in pass band
 High Attenuation Rate

Chebyshev Filters
 Maximum Attenuation Rate
 Ripple in pass band

Bessel Filters
 Maximally flat time delay in response to step input
 Attenuation Rate is very gradual

Chap 0 40
Filter Design Table
 C when 0 = R0 = 1

Chap 0 41
Filter Design Example

Low pass five-pole Butterworth filter with a corner
frequency of 200Hz and input resistance of 50K
 Economic Solution = 3rd order + 2nd order
 Desired R and C ?
 C1A = (0 R0 C0 ) / ( R)
= 1x1x1.753 / 2x200x50K = 27.9 nF
 C2A = 21.6 nF, C3A = 6.7 nF, C1B = 51.5 nF, C2B = 4.9 nF

Chap 0 42
VCO(Voltage Controlled Oscillator)

VCO = Voltage to 
VCO converts an input
Frequency(V/F) voltage to a series of
Converter output digital pulses
whose frequency is
proportional to the
input voltage

Applications
 ADC
 Digital Transmission
 Telemetry
 Digital Voltmeter

Chap 0 43
VCO (Cont.)

Module form
 Better linearity, Lower Gain drift, Higher full-scale
frequencies than IC

Monolithic IC form
 Less expensive, Small size
 Lower drift, Better flexibility of frequency range

Examples
 LM331
 Low cost VCO from National Semiconductor
 Maximum nonlinearity 0.01% over 1 ~ 100KHz
 CD4046B
 PLL contains VCO
 Maximum nonlinearity 1.0% over 1 ~ 400MHz

Chap 0 44
PLL(Phase Locked Loop)

VCO is commonly used 
Control loop
in PLL  Goal

Applications  Minimize z(t)
 Communications  s(t) = r(t)
 Radar  Change r(t) until z(t)=0
 Time and frequency
 s(t) can be obtained
By reading r(t)
control
 Instrumentation system

Homework #2-10
 통신 교재를 참고하여
PLL 의 설계 및 해석
과정을 정리할 것

Chap 0 45
VCO Interfacing

Output of VCO 
# of pulse / Duration
 Digital pulses whose  Duration
frequency is  Controlled by
proportional to input Sampling Gate
voltage  # of Pulse
 Counted in Counter

Chap 0 46
More on Passive Circuits
Divider
Bridge
Filter : See Chapter 1

Sensor Time Response


Divider Circuit

Convert Register 
Output Voltage
Variations to Voltage  Vo = {R2 / (R1 + R2)} Vs
Variations

Vs

R1, R2 대신 저항이
변화하는 센서를 연결하면
저항의 변화를 전압의
R1
변화로 바꾸어 측정할 수
Vo 있음

R2

Chap 0 48
Divider Circuit: Drawbacks

Vo is not linearly changed
 Ex: Vs = 5V, R1 = 1K, R2 = 0 ~ 1K(Sensor)
Vo Vs/2
Vs/3
R2
500 1K

Output Impedance(R1 || R2) is not so High

Large Power Consumption
 Both R1 and R2 dissipate power

Sensor 출력이 0 인 경우에도 출력 발생

온도 영향
 R1, R2 에 Insulation 필요

Chap 0 49
Divider Circuit: Example

R1 = 10K, R2 = (4K ~ 12K), Vs = 5V
 Maximum Vo = 5 {12 / (10+12)} = 2.73V
 Minimum Vo = 5 { 4 / (10 + 4)} = 1.43V
 Maximum Z = (10K || 12K) = 120/22 K
 Minimum Z = (10K || 4K) = 40/14 K
 Maximum Power = (Vo)2/R2
= (2.73)2/12K = 0.62mW
 Minimum Power = (1.43)2/4K = 0.51mW

Chap 0 50
Bridge Circuit

Convert Impedance

Eo = Ea – Eb
 Ea = {R3/(R1 + R3)} E
variance to Voltage
 Eb = {R4/(R2 + R4)} E
variation  Eo = {(R2R3 – R1R4) /

Basic DC Wheatstone (R1+R3)(R2+R4) } E
Bridge 
Null Condition (Eo = 0)
 R1R4 = R2R3
 E 에 무관함
R1 R2 
Example (R1 is sensor)
 Eo 측정치를 이용하여
E a Eo b 직접 계산
 Null Condition 이 될 때까지
R3 R4 R2 조절한 후 계산

Chap 0 51
Using Galvanometer as a Null Detector

Thevenin’s Equivalent 
RTH = R1 || R3 + R2 || R4
= R1R3/(R1+R3)
+ R2R4/(R2+R4)
R1 R2  VTH = {(R2R3-R1R4) /
E a G b (R1+R3)(R2+R4)} E
= Eo
R3 R4  IG = VTH / (RTH +RG)

a 
Example
RTH  R1=R2=R3=2K, R4 =
2.05K, RG = 50, V=5V
VTH IG RG
 IG = -15.0A

b
Chap 0 52
Bridge Sensitivity
R R R R R+R R+R

E G E G E G
R R+R R+R R+R R+R R+R


Output (Approximation)
Eo = (R/4R)E Eo = (R/2R)E Eo = (R/R)E

Sensitivity
Eo/R = E/4R Eo/R = E/2R Eo/R = E/R


Accuracy of Approximation More Sensitive
 R < 0.05R, then 98% Accurate
 R < 0.1R, then 95% Accurate

Chap 0 53
Bridge Resolution

Detector 의 Resolution 에 의하여 결정됨

Example
 R1=R2=R3=R4=120, E=10V
 If resolution of Detector is 10mV, Then
resolution of R4 ?
 10mV = {R3 / (R1+R3)}E - {R4 / (R2+R4)}E
  R4 = 119.52
  R = 120 – 119.52 = 0.48
  R4 가 120  0.48 (119.52 ~ 120.48) 사이면
Null 로 Detect

Chap 0 54
Lead Compensation

Bridge at Control room 
Compensation using 3
and Sensor in Remote Lead Lines
Plant 
Eo = {R/(R+R+RL)} E –

Eo = {R/(R+R)} E – {(R)/(R+R+RL)} E
{(R+RL)/(R+R+RL)} E =0
0

R R
R R
E G RL
E G RL
R R
R R RL
RL
Chap 0 55
Potential Measurement using Bridge

저항을 변경하여 
Ec = Ea + Ex
Galvanometer 의 
E = Ec – Eb
눈금을 Null 이 되게 함 = - (Eb – Ea –Ex)

Then Ex ?? = Ex
+ {R3/(R1+R3)}E
R1 R2 - {R4/(R2+R4)}E
c 
At Null (E = 0)
E a Ex G b  Ex = {R4/(R2+R4)}E
- {R3/(R1+R3)}E
R3 R4

Chap 0 56
AC Bridges

Eo = {Z3/(Z1+Z3)}E 
Example
- {Z4/(Z2+Z4)}E  Z1 = 1K

Null Condition  Z2 = 2K
 Z1Z3 = Z2Z4  Z3 = R(1K) + C(1F)
 Z4 = R4 (?) + C4(?)
 Z3 = R + 1/(jC)
Z1 Z2 = 1K – j/(1 x )
 Z1Z3=Z2Z4
E a G b • Re1 + j*Im1 = Re2 +
j*Im2
Z3 Z4 – R4 = 2K
– C4 = 0.5F

Chap 0 57
Summary of Bridge

Convert variation of resistance to variation
of voltage

Nonlinear response to a linear variation of
resistance
 Assumed Linear in a small range

Chap 0 58
Sensor Time Response

Desired Response 
No Sensor Gives Ideal
 Step Response Response
 Model
 Zero order
 First order
 Second order

Real Application
 Assumed Zero Order or
First Order
 Model or Table is used

Chap 0 59
Zero Order Response

b(t) = Kc(t-td) + bd b(t)
b(t)
 td = bd = 0 Kcf
 b(t) = K  c(t) Kci
 Ideal with Gain K t

b(t)
 td = 0
 b(t) = K  c(t) + bd Kcf+bd
 Biased Kci+bd t

 bd = 0 b(t)
Kcf
 b(t) = K  c(t-td)
Kci
 Time Delayed t
td
Chap 0 60
First Order Response
 b(t )  bi  (b f  bi )[1  e  t /  ] 
To Reduce Transient
 bi : Initial Sensor Error
Output   << 1
 bf : Final Sensor  Modeling the response
Output  Mathematic
  : Sensor Time  Table Look Up
Constant  b(t )  bi  (b f  bi )[1  e  t /  ]
 t=
63%
b(t )  bi  [1  e 1 ](b f  bi )
 0.6321(b f  bi )
 t = 5
 b(t )  bi  0.993(b f  bi )
Transient Steady State
Chap 0 61
Example: 1st Order Response

Temperature sensor
 Linear TF: 33mV/C, with =1.5sec
 Find output at 0.75sec after input 2041C
 From b(t )  bi  (b f  bi )[1  e  t /  ]
• b(0)  bi = 20C x 33mv/C = 660mV
• b()  b f = 20C x 33mv/C = 1353mV
• b(t )  660  (1353  660)[1  e t /1.5 ] mV
 b(0.74) = 932.7 mV
• 932.7 mV / 33 mV / C = 28.3C
 Error = 41C – 28.3C = 12.7C

Chap 0 62
Second Order Response
 R(t )  R0 e  at sin(2 f n t )
 R(t) : Transient Output
 a : Output Damping
Constant
 fn : Natural Frequency
 Ro : Amplitude

Chap 0 63

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