Lecture 9

Memory-Mapped Peripherals
(Ch.12)
Pin Diagram

LPC2377/78
lpc23xx user manual Rev4.1, page 104
Pin Diagram
Schematic
LPC2378
Functional Block Diagram
The LPC2378 has 104 GPIO
pins, most pins have multiple
functions. The default on reset
is GPIO (general-purpose
input/output)
Memory-mapped I/O
 Memory-mapped I/O or memory-mapped peripheral uses
the same address bus to address both memory and I/O
devices (peripheral units).
 The memory and registers of the I/O devices (peripheral units)
are mapped to (associated with) address values.
 When CPU sends out an address, it may refer to a portion of
physical RAM/ROM, but it can also refer to memory/registers
associated with that I/O device.
 For ARM, LDR and STR instructions can be used to read data
from an input device and send data to an output device,
respectively, given that the address of that I/O device is
known.
Memory Map
LPC2377/78

lpc23xx user manual Rev4.1, page 19

Memory Map
LPC2377/78

lpc23xx user manual Rev4.1, page 24

General Purpose I/O
• GPIO pins are usually grouped into 8, 16 or 32-bit to form ports.
• A port is where data enters/leaves the system.
• A port is normally accessed as a single entity through a register.
• The direction (i.e. input or output) of the GPIO pins must be
configured before they are used.
• It is possible to have a mixture of inputs and outputs on a port.
• Some microcontrollers allows access to individual bits of a port
rather than the whole port.
LPC2378 G
• The LPC2378 has five 32-bit Ports (numbered 0 to 4)
– Not all 32 bits are implemented in each port.
Example
AREA FLASH, CODE, READONLY
ARM
INCLUDE LPC23xx.inc ;MMR definitions
EXPORT __main

__main
LDR R0, =(PINSEL8)
MOV R1, #0 ; set port P4.15 .. P4.0 to GPIO (default behavior)
STR R1, [R0]

LDR R0, =(PINMODE8)

MOV R1, #0 ;set port P4.15 .. P4.0 to have a pull-up resistor
STR R1, [R0]

LDR R0, =(FIO4DIRL)

LDR R1, [R0]
MOV R2, #0x00000003 ; set P4.1 .. P4.0 as output
ORR R2, R2, R1
STR R2, [R0]
PINSEL8
lpc23xx user manual Rev 4.1, Page 156
PINSELx registers
• There are 10 PINSEL registers.
• Two PINSEL registers are used for each port
– PINSEL0 & PINSEL1 for Port0
– PINSEL2 & PINSEL3 for Port1
– PINSEL4 & PINSEL5 for Port2
– PINSEL6 & PINSEL7 for Port3
– PINSEL8 & PINSEL9 for Port4
– PINSEL10 (ETM enable)
Primary function, alternate function
• Most I/O pins on microcontrollers support multiple functions.
• The microcontroller must be configured to select the correct
function.
• The PINSEL registers control the functions of the device pins.
TRACECLK PWM1[1]
TXD1 GP I/O P2[0]

11 10 01 00
Function select bits PIN CONNECT
(from the PINSEL
register) BLOCK

Physical I/O pin

Primary function, alternate function
• The PINSEL registers controls the functions of the pins.
• 2 bits are used to control the function of each pin.
• As a result, two 32-bit registers are used to control the functions of all
32-pins of one port.
Ex: the PINSEL0 and PINSEL1 registers control the functions of the
pins on Port0.
• The direction control bit in the IO0DIR register (or the FIO0DIR register if the
enhanced GPIO function is selected for port 0) is effective only when the GPIO
function is selected for a pin. For other functions, the direction is controlled
automatically.
Example
AREA FLASH, CODE, READONLY
ARM
INCLUDE LPC23xx.inc ;MMR definitions
EXPORT __main

__main
LDR R0, =(PINSEL8)
MOV R1, #0 ; set port P4.15 .. P4.0 to GPIO (default behavior)
STR R1, [R0]

LDR R0, =(PINMODE8)

MOV R1, #0 ;set port P4.15 .. P4.0 to have a pull-up resistor
STR R1, [R0]

LDR R0, =(FIO4DIRL)

LDR R1, [R0]
MOV R2, #0x00000003 ; set P4.1 .. P4.0 as output
ORR R2, R2, R1
STR R2, [R0]
PINMODE8
lpc23xx user manual Rev 4.1, Page 156
Pin mode select registers
• Two PINMODE registers are used for each port
(similar to PINSEL registers):
– PINMODE0 & PINMODE1 for Port0
– PINMODE2 & PINMODE3 for Port1
– PINMODE4 & PINMODE5 for Port2
– PINMODE6 & PINMODE7 for Port3
– PINMODE8 & PINMODE9 for Port4
Pin mode select register
• The PINMODE registers control the on-chip pull-
up/pull-down resistor feature (the mode) for all ports.
• The on-chip pull-up/pull-down resistor can be selected for
every pin regardless of the function on this pin with the
exception of the I2C pins and the USB pins.
• Two bits are used to control the mode of each pin. Bits are
reserved for unused pins as in the PINSEL registers.
PINMODE
UM10211 Rev4.1
Section 9.5.12 (Page 166)
Pull-up & Pull-down resistors

Pull-up resistor Pull-down resistor

Example
AREA FLASH, CODE, READONLY
ARM
INCLUDE LPC23xx.inc ;MMR definitions
EXPORT __main

__main
LDR R0, =(PINSEL8)
MOV R1, #0 ; set port P4.15 .. P4.0 to GPIO (default behavior)
STR R1, [R0]

LDR R0, =(PINMODE8)

MOV R1, #0 ;set port P4.15 .. P4.0 to have a pull-up resistor
STR R1, [R0]

LDR R0, =(FIO4DIRL)

LDR R1, [R0]
MOV R2, #0x00000003 ; set P4.1 .. P4.0 as output
ORR R2, R2, R1
STR R2, [R0]
FIOxDIR
FIOxDIR
Fast GPIO port Direction control register
Example
FIO2DIR = 0x000000FF ;make PORT2 bits 0 to 7 output
FIO2DIR0 = 0xFF ;make PORT2 bits 0 to 7 output

If we want to only affect specific bits we can use:

Syntax in C language:
FIO2DIR |= 0x00000040; // only change bit 6 using
FIO2DIR |= (1 << 6); // or using shift notation
Port Direction (Output)
• Setting port direction to OUTPUT

LDR R0, =(FIO3DIR)

MOV R2, #0x000003 ;set P3.1 and P3.0 as an output
STR R2, [R0]

LDR R0, =(FIO3DIR)

LDR R1, [R0]
MOV R2, #0x0000003 ;set P3.1 and P3.0 as an output
ORR R2, R2, R1
STR R2, [R0]
Logic output (0 / 1; low / high)
• Setting Port3 pin 0 and 1 to logic one (high)

LDR R0, =(FIO3SET)

MOV R2, #0x03
STR R2, [R0]
Port Direction (Input)
Setting a port direction to INPUT
– PORTS default to input on reset
– Set Direction using FIOxDIR (no harm in explicitly
setting FIOxDIR)

Syntax in C language:
FIO2DIR = 0x00000000; // make ALL bits inputs (the default
after a reset)
FIO2DIR |= 0x000000400; // make bit 10 output
leave rest unchanged!
FIO2DIR &= ~0x00000400; // ?
FIO2DIR &= ~(1<<10); //
Example (continue)
...
LDR R0, =(FIO4SET)
MOV R2, #0x00000003
STR R2, [R0]

LDR R0, =(FIO4CLR)

MOV R2, #0x00000003
STR R2, [R0]

LDR R0, =(FIO0MASK)

MOV R1, #0x0000000F
STR R1, [R0]

LDR R0, =(FIO0SET)

MOV R1, #0x0000000F
STR R1, [R0] ; P0.3 ... P0.0 pins does not change
;because of MASK
UM10211 – Chapter 10
Generic Description Access Reset Port Register name and
Name value address

FIODIR Fast GPIO Port Direction control register. This register R/W 0x0 FIO0DIR - 0x3FFF C000
individually controls the direction of each port pin. FIO1DIR - 0x3FFF C020
FIO2DIR - 0x3FFF C040
FIO3DIR - 0x3FFF C060
FIO4DIR - 0x3FFF C080

FIOSET Fast Port Output Set register using FIOMASK. This R/W 0x0 FIO0SET - 0x3FFF C018
register controls the state of output pins. Writing 1s FIO1SET - 0x3FFF C038
produces highs at the corresponding port FIO2SET - 0x3FFF C058
pins. Writing 0s has no effect. Reading this register FIO3SET - 0x3FFF C078
returns the current contents of the port output register. FIO4SET - 0x3FFF C098
Only bits enabled by 0 in FIOMASK can be attered.

FIOCLR Fast Port Output Clear register using FIOMASK0. This WO 0x0 FIO0CLR - 0x3FFF C01C
register controls the state of output pins. Writing 1s FIO1CLR - 0x3FFF C03C
produces lows at the corresponding port FIO2CLR - 0x3FFF C05C
pins. Writing 0s has no effect. Only bits enabled by FIO3CLR - 0x3FFF C07C
0 in FIOMASK0 can be altered. FIO4CLR - 0x3FFF C09C
UM10211 – Chapter 10
Generic Description Access Reset Port Register name and
Name value address

FIOMASK Fast Mask register for port. Writes, sets, clears, and R/W 0x0 FIO0MASK - 0x3FFF C010
reads to port (done via writes to FIOPIN, FIOSET, and FIO1MASK - 0x3FFF C030
FIOCLR, and reads of FIOPIN) alter or return only the FIO2MASK - 0x3FFF C050
bits enabled by zeros in this register. FIO3MASK - 0x3FFF C070
FIO4MASK - 0x3FFF C090

FIOPIN Fast Port Pin value register using FIOMASK. The R/W 0x0 FIO0PIN - 0x3FFF C014
current state of digital port pins can be read from FIO1PIN - 0x3FFF C034
this register, regardless of pin direction or alternate FIO2PIN - 0x3FFF C054
function selection (as long as pins are not configured FIO3PIN - 0x3FFF C074
as an input to ADC). The value read is masked by FIO4PIN - 0x3FFF C094
ANDing with inverted FIOMASK. Writing to this
register places corresponding values in all bits
enabled
by zeros in FIOMASK.
Important: if a FIOPIN register is read, its bit(s)
masked with 1 in the FIOMASK register will be set to 0
regardless of the physical pin state.
LPC2378 GPIO
• The PORTS are accessed through specific registers.
(These registers are memory locations that are defined in
the LPC23xx.inc file)
• All the ports are accessible through FIO registers - these
uses a fast internal bus operation.
• Each Port has its own set of FIO registers to setup, control
and access the port.
• To maintain backwards compatibility with previous
devices PORT0 and PORT1 are also accessible by an
alternate set of registers - using a slower internal bus.
• We should use always use the FIO registers not the slower
ones!
The FIO Register
FIOxDIR: allow direction control of individual bits.
FIOxPIN: An entire port value can be read or written in
one instruction.
FIOxSET and FIOxCLR: Bit-level set and clear registers
allow a single instruction set or clear of any number of
bits in one port.
FIOxMASK: Mask registers allow treating sets of port
bits as a group, leaving other bits unchanged
Note: x can be from 0 to 4
all I/O pins default to input after reset.
Examples
Describe what the following code segment does
LDR R0, =(PINSEL8)
MOV R1, #1
STR R1, [R0]
Examples
LDR R0, =(PINSEL0)
LDR R2, [R0]
MOV R1, #0x50
ORR R2, R2, R1
STR R2, [R0]
Examples
LDR R0, =(PINMODE9)
LDR R1, =0xFFFF
STR R1, [R0]
Examples
LDR R0, =(PINMODE4)
LDR R1, =0x2A
STR R1, [R0]
Examples
LDR R0, =(FIO3DIR)
MOV R1, #0x0F
STR R1, [R0]
Examples
LDR R0, =(FIO0DIR0)
LDR R1, [R0]
MOV R2, #0xC3
ORR R2, R2, R1
STR R2, [R0]
Examples
LDR R0, =(FIO3CLR)

MOV R1, #0xC

STR R1, [R0]
Examples
LDR R0, =(FIO3CLR)

MOV R1, #0xC

STR R1, [R0]
Examples
LDR R0, =(FIO2SET)

MOV R1, #0xC

STR R1, [R0]
Examples
LDR R0, =(FIO2PIN)

LDR R1, [R0]

Exercise
Find the sum of the 4-bit numbers from the
two 4-bit inputs and output the sum.

4
Input A P2.3 .. P2.0
1. Set Input A, Input B, and Sum as
GPIO 4
Input B P2.11 .. P2.8
2. Configure each pin as neither pull-
up or pull-down resistor
3. Set Input A, Input B as an input 4
Sum P3.3 .. P3.0
4. Set Sum as an output