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FET Amplifiers: Junction Field Effect Transistor AC Analysis
FET Amplifiers: Junction Field Effect Transistor AC Analysis
AMPLIFIERS
Junction Field Effect Transistor
AC Analysis
Field Effect Transistor
Slope at point of
operation
Calculating gm at various bias points.
Slope of the
characteristic at the
point of operation
Mathematical Definition of gm
gm can be written as yfs on specification sheets.
2 I DSS VGS
gm 1
| VP | V P
2 I DSS
g m0
| VP |
The initial equation then becomes
VGS
g m g m 0 1
VP
Exercise on gm
For a JFET with IDSS = 8 mA and VP = - 4V, determine
(a) Maximum gm
(b) Value of gm when VGS = -1.5V
Solutions
2 I DSS VGS
gm 1
| VP | V P
2 I DSS
g m0
| VP |
Effects of ID on gm
ID 2 I DSS
g m g m0 g m0
I DSS | VP |
where
gm ID
gm0 IDSS
0.707 gm0 IDSS/2
0.5 gm0 IDSS/4
0 0 mA
Example gm ID
gm0 IDSS
Plot gm versus ID with
0.707 gm0 IDSS/2
IDSS = 8mA and VGS = -4V 0.5 gm0 IDSS/4
0 0 mA
ID
g m g m0
I DSS
2 I DSS
g m0
| VP |
FET Impedance
FET input impedance, Zi is sufficiently large.
Usually in the range of 109 (1000M)
Zi FET
FET output impedance, Zo is similar in magnitude
to conventional BJTs.
Output impedance appears as yos with units of s
Definition of rd using FET drain characteristics.
FET AC equivalent circuit.
JFET fixed-bias configuration.
Substituting the JFET AC equivalent circuit
unit
Zi FET R G
Determining Zo.
Set Vi 0
Zo FET = rd || R D
if rd 10R D
Determining Zo.
Set Vi 0
Zo FET = R D
if rd 10R D
Determining Av
A v = Vo Vi = -g m rd || R D
A v = Vo Vi = -g m R D when rd 10R D
Determining Av
Vo = -g m Vgs rd || R D
Vgs = Vi
Vo = -g m Vi rd || R D
Example
Determine the
following for the network
IDSS=10mA 1. g m and rd
VP=-8V 2. Z i
3. Z o
4. A V
5. A V ignoring effect of rd
IDQ=5.625mA
VGSQ=-2V
yOS=40S
Solutions
IDQ=5.625mA
VGSQ=-2V
IDSS=10mA 2I DSS 2 10mA
g m0 = = = 2.5mS
VP=-8V VP 8V
1 1
rd = = = 25 k
y os 40S
Z i = R G = 1MΩ
yOS=40S Zo = rd || R D = 2k || 25k = 1.85k
Solutions..
Vo
AV = = -g m R D || rd
Vi
With rd , A v = -3.48
Vo
AV = = -g m R D
Vi
Without rd , A v = -3.76
Self-Bias JFET configuration.
Zi = ?
Zo = ?
AV = ?
JFET voltage-divider configuration
Z i R1 || R2
Z o rd || RD
AV :
Vi Vgs
and
Vo g mVg s ( RD || rd )
If rd l arg e,
Thus AV g m RD