MICROPROCESSOR SYSTEMS AND

INTERFACING (EEE342)
RECAP
 Scope of the Course
 Evolution of Microprocessor

 Computer vs. Microprocessor

 Basic Computer Organization

 Microprocessor connection with External World

 Computer Organization vs. Computer Architecture

 Classification of Microprocessors w.r.t Applications

 RISC and CISC architectures

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REPRESENTING DATA IN A COMPUTER

 When programming in a high-level language like Java or C++,

we use variables of different types
 Integer, float, double, or character
 Once you have declared variables, you don’t have to worry
about how the data is represented in computer
 When you deal with a computer at the machine level
 You must be more concerned with how data is stored
 Data sizes
 Smallest addressable unit: byte (8 bits)
 Often deal with words of data
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 Byte Aligned word Aligned double
address word
ASSIGNING DATA TO MEMORY IN X86
0
 Word size is processor-dependent
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 16 bits on x86, 32 bits on MIPS
Unaligned
 Considerations with multi-byte data word
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 Is the data aligned?
 Easier/faster to access aligned data 12
 How does the data organized in memory?
 endianness 16

 Big Endian Processors

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 Machine that stores the most significant byte first
 IBM 36/370, Motorola 68K, MIPS, Sparc, HP PA
 Little Endian Processors
Unaligned
 Machine stores the least significant byte first double word
 Intel 80x86, DEC Vax, DEC Alpha, SuperH
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EXAMPLE
 Suppose integer is stored as 4 bytes (For those who are using DOS
based compilers such as C++ 3.0 , integer is 2 bytes) then a variable x
with value 0 x 0 1 2 3 4 5 6 7 will be stored as follows.

0x100 0x101 0x102 0x103 Big Endian

Machine that stores the
01 23 45 67 most significant byte first
Big Endian

0x100 0x101 0x102 0x103 Little Endian

67 45 23 01 Machine stores the least
significant byte first
Little Endian

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EXAMPLE
 Given the following memory contents

 Leftmost byte has lowest address

 First line addresses: 0x200C, 0x200D, 0x200E, 0x200F
Lo Hi
0x200C 40 96 2C 00
 What is the value of: 0x2010 55 12 CD AB
 The word starting at address 0x200D? 0x2014 01 23 88 99
 The double word starting at address 0x2012?

 Are these data aligned?

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SOLUTION
 Word at 0x200D = 0x2C96 Lo Hi
 Address is not divisible by 2  unaligned 0x200C 40 96 2C 00
 Double word at 0x2012 = 0x2301ABCD 0x2010 55 12 CD AB
 Address is not divisible by 4  unaligned 0x2014 01 23 88 99
 Remember, hexadecimal is base 16—0x12 = 1810

 Other format of hexadecimal notation

0x16A794
(16A794)16
16A794h

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MEMORY ORGANIZATION AND ADDRESSING
 A Computer memory is considered as a matrix of bits: A linear array of
addressable storage cells that are similar to registers

 Each row has a length typically equivalent to the word size of the machine

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MEMORY ORGANIZATION AND ADDRESSING
 A Computer memory is considered as a matrix of bits: A linear array of
addressable storage cells that are similar to registers

Word size is processor-dependent 32-bit

64-bit
0/1 8-bits = 1 Byte
Several bytes = 1 word
Size of word

 Each row has a length typically equivalent to the word size of the machine

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WORD ADDRESSABLE AND BYTE ADDRESSABLE
 Two types of memories are available:
 Byte addressable: Each byte has its own address (each memory row contain 8 bits only)
 Word addressable: Each word has a unique address (each memory row contains one word that can
be larger than 8 bits)

able ble
Word size is processor-dependent
a
e ss 0 16 bits on x86e ss 32 bits on MIPS
dr dr
Ad :
Ad 0
d yt e
or i B :
W j j+1 j+2 j+3
j i
i+1
4096 word j+4 i+1 j+4 j+5 j+6 j+7
i+2
4096 word j+8 i+2 j+8 j+9 j+10 j+11

The relation is as follows:

4095 4095
i=j
i+1=j+4
i+ 2=j+8
1 word Adding number of bytes in the word to get the next
1 wordof the word 4 Bytes
……………. successive location 1 word 1 Byte
4 Bytes 32 bites
……………. 32 bits 10
4096 x 32 bits
 WORD ADDRESSABLE AND BYTE ADDRESSABLE
Memory Size #. bits req to address each #. bits req to address each Byte
Word
4096 x 16 12 13
1024 x 32 10 12
256 x 16 8 9
512 x 64
9 12

No. of words in memory = 4096 log2 (4096) = 12

No. of bits per word = 16
or
Physical address space log10(4096) / log10 (2) = 12
• Determined by the address bus width
• Pentium has a 32-bit address bus log2 (2) = 1
• Physical address space = 4 GB = 232 bytes
• Itanium with a 64-bit address bus can support 16 bits =or2 bytes
• Up to 264 bytes of physical address space log10(2) / log10 (2) = 1
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REAL MODE
 Real mode is an operation which allows the microprocessor to address
only first 1 MB of memory Conventional
Memory/DOS Memory
System
How many bits we need to access 1 MB of memory?
Memory (1 MB)
If we don’t have a 8086 processor like
Pentium 4, core 2, which usually F F F F F H
operates in 64 – bit mode. :
This 64-bit processor :
1111 1111 1111 1111 cannot
1111 operate/run
in real mode :
So how does the DOS application will run :

1MB
on such systems :
Real :
0000 0000 0000 0000 0000
Mode :
Emulator O S :
heD 0 0 0 0 0 H
t
n 13
Ru
REAL MODE
 Irrespective of the Processor, if it resets/power-on, it begins the operation
in Real mode, which is to load the Operating system

No memory protection

No multi-tasking

1MB
No processor privileged levels

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PROTECTED MODE
 Protected mode is the normal operating mode for a 32 bit systems.
 An older 32 bit system can access up to 232 amount of memory or 4
Gbytes
• New processors got extension or the physical
address extensions (PAE) that allows up to 64 GB
of RAM, But only 4 GB at a time

GB
• Protected mode allows

464MB
• Multi-tasking
• Memory protection
• Processor privileged levels

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8086/8088 MICROPROCESSOR

 The 8088 microprocessor includes 13 different 16-bit internal registers

 The memory of an 8088 – microprocessor is organized as 8-bit (bytes),
not as 16-bits (words)
 Data Organization
 Lower address byte and higher address byte
 The two bytes represent the word
 01010101000000102 = 550216

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DATA ORGANIZATION

 Even- or odd-addressed word

 If the least significant bit of the address is 0,
the word is said to be held at an even-
addressed boundary.

 Aligned word or misaligned word

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DATA ORGANIZATION
 A double word corresponds to four consecutive bytes of data stored in
memory.

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DATA ORGANIZATION
 What is the data word shown in figure (b)? Express the result in
hexadecimal form. Is it stored at an even – or odd – addressed word
boundary? Is it an aligned or misaligned word of data?
 Solution:
 111111012 = FD16 = FDH
 101010102 = AA16 = AAH
 Together the two bytes give the word
 1111 1101 1010 10102 = FDAA2 = FDAAH

 Expressing the address of the least significant byte in binary

form gives
 0072BH = 0072B16 = 0000 0000 0111 0010 10112
 Therefore, it is misaligned word of data.
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DATA ORGANIZATION
 Storage of a pointer in the memory
 The higher address word represents the segment base address
 The lower address word represents the offset

 Example:
 Segment base address = 3B4C16 = 0011 1011 0100 11002 20
DATA ORGANIZATION
 How should the pointer with segment base address equal to A00016 and
offset address 55FF16 be stored at an even-address boundary starting at
0000816? Is the double word aligned or misaligned?
 Solution:
Storage of the two-word pointer requires four consecutive byte
locations in memory, starting at address 0000816
The least-significant byte of the offset is stored at address 0000816
and is shown as FF16 in the figure.
The most significant byte of the offset, 5516, is stored at address
0000916
These two bytes are followed by the least significant byte of the
segment base address, 0016, at address 0000A16
Its most significant byte, A016, at address 0000B16
Since the double word is stored in memory starting at address 21
DATA TYPES

 Integer data type

 Unsigned or signed integer
 Byte-wide or word-wide integer

 The most significant bit of a signed integer is a sign bit

 A zero in this bit position identifies a positive number

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DATA TYPES

 The range of a signed byte integer is + 127 ~ - 128

 The range of a signed word integer is + 32767 ~ - 32768
 The 8088 always expresses negative numbers in 2’s complement.

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DATA TYPES

 Example:

 A signed word integer equals FEFF16. What decimal number does it represent?

 Solution:

 FEFF16 = 11111110111111112
 The most significant bit is 1, the number is negative and is in 2’s complement
form
 Converting to its binary equivalent by subtracting 1 from the least significant bit
 Then complement all bits given:
 FEFF16 = -00000001000000012 = -257

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