CHAPTER-3:

BASIC COMPUTER ORGANIZATION

& DESIGN

Compiled by Enshishu Ts. 1

Compiled by Enshishu Ts. 2
Compiled by Enshishu Ts. 3
 3.2 INSTRUCTION CODES
The Internal organization of a digital system is defined by the
sequence of microoperation it performs on data stored in its
registers
The user of a computer can control the process by means of a
program
A process is controlled by a program
 A program is a set of instructions that specify the operations,
data, and the control/processing sequence
 An instruction is stored in binary code that specifies a sequence
of microoperations
 Instruction codes together with data are stored in memory (Stored
Program Concept)
Compiled by Enshishu Ts. 4
 3.2 INSTRUCTION
CODES…
 Each computer has its unique instruction set
 Instruction codes and data are stored in memory
 The computer reads each instruction from memory and places it in a
control register
 The control unit interprets the binary code of the instruction and
proceeds to execute it by issuing a sequence of micro-operations
 An Instruction code is a group of bits that instructs the computer to
perform a specific operation. It is divided into parts (basic part is the
operation part)

Compiled by Enshishu Ts. 5

 3.2 INSTRUCTION CODES…
 The operation code of an instruction is a group of bits that
defines certain operations such as add, subtract, shift, and
complement
 Memory words can be specified in instruction codes by their
address
 Each computer has its own particular instruction code format
 Instruction code formats are conceived by computer designers
who specify the architecture of the computer

Compiled by Enshishu Ts. 6

 3.2 INSTRUCTION CODES…
 An instruction code is usually divided into operation code, operand address,
addressing mode, etc
 The simplest way to organize a computer is to have one processor register
(accumulator AC) and an instruction code format with two parts (op code,
address)

Compiled by Enshishu Ts. 7

 INSTRUCTIONS ARE READ FROM
MEMORY AS WORDS

 Instructions can be formatted to fit in one or more

memory words.
 An instruction may contain
 An opcode + data (immediate operand)
 An opcode + the address of data (direct addressing)
 An opcode + an address where the address of the data is found
(indirect addressing)
 Data only (location has no instructions)
 An opcode only (register-reference or input/output instruction)

Compiled by Enshishu Ts. 8

 3.2 INSTRUCTION CODES…
(STORED PROGRAM
ORGANIZATION)

Compiled by Enshishu Ts. 9

 3.3. INSTRUCTION SET

• The complete collection of instructions that are understood by a CPU

• Machine language: binary representation of operations and (addresses of)
arguments
• Assembly language: mnemonic representation for
humans, e.g.,
OP A,B,C (meaning A <- OP(B,C))

Compiled by Enshishu Ts. 10

 3.3. INSTRUCTION
SET…
(ELEMENTS OF AN
INSTRUCTION)
 Operation code (opcode)
 Do this: ADD, SUB, MPY, DIV, LOAD, STOR

 Source operand reference

 To this: (address of) argument of op, e.g. register, memory location

 Result operand reference

 Put the result here (as above)

 Next instruction reference (often implicit)

 When you have done that, do this: BR

Compiled by Enshishu Ts. 11

 Mano’s Computer: each instruction
occupies one Memory Words
15 12 11 0

• 4-bit opcode Bits 15-12

• How many possible instructions?
– 24=16
• This leaves 12 bits for the address
– How many words of memory?
– 212 = 22•210 = 4K = 4096 16-bit words

Compiled by Enshishu Ts. 12

 Mano's simple Computer:
Instructions 0
15 12 11

Any bits other than 0111 and

I 1111 are called memory
reference instructions
000 AND 100 BUN
001 ADD (Branch Unconditional)
010 LDA 101 BSA
(Load Accumulator) (Branch and Store Address)
011 STA 110 ISZ
(Store Accumulator) (Increment and Skip if Zero)

Compiled by Enshishu Ts. 13

 Computer Instruction
– 3 Instruction Code Formats : Hex Code
Symbol I= 0 I= 1 Description
• Memory-reference instruction AND 0xxx 8xxx And memory word to AC
ADD 1xxx 9xxx Add memory word to AC
–Opcode = 000  110 LDA 2xxx Axxx Load memory word to AC
STA 3xxx Bxxx Store content of AC in memory
»I=0 : 0xxx ~ 6xxx, I=1: 8xxx ~Exxx BUN 4xxx Cxxx Branch unconditionally
I=0 : Direct, 15 14 12 11 0 BSA 5xxx Dxxx Branch and Save return address
I=1 : Indirect ISZ 6xxx Exxx Increment and skip if zero
I Opcode Address CLA 7800 Clear AC
CLE 7400 Clear E
CMS 7200 Complement AC
»Register-reference instruction CME m 7100 e Comp
CIR 7080 Circulate right AC and E
–7xxx (7800 ~ 7001) : CLA, CMA, CIL 7040 Circulate left AC and E
15 14 12 11 0 INC 7020 Increment AC
SPA 7010 Skip next instruction if AC positive
0 1 1 1 Register Operation
SNA 7008 Skip next instruction if AC negative
SZA 7004 Skip next instruction if AC zero

–Input-Output instruction SZE

HLT
7002
7001
Skip next instruction if E is 0
Halt computer
–Fxxx(F800 ~ F040) : INP, OUT, ION, SKI, INP
OUT
F800
F400
Input character to AC
Output character from AC
SKI F200 Skip on input flag
15 14 12 11 0
SKO F100 Skip on output flag
1 1 1 1 I/O Operation ION F080 Interrup
IOF F040 Inter
Compiled by Enshishu Ts. 14
Computer Instruction

Compiled by Enshishu Ts. 15

 Computer Instructions
Instruction Set Completeness
• The set of instructions are said to be complete
if the computer includes a sufficient number of
instructions in each of the following categories:
– Arithmetic, logical, and shift instructions
– Instructions for moving information to and from
memory and processor registers
– Program control instructions together with
instructions that check status conditions
– Input & output instructions

Compiled by Enshishu Ts. 16

 3.4INSTRUCTION CYCLE
 A program is a sequence of instructions stored in
memory
 The program is executed in the computer by going
through a cycle for each instruction (in most cases)
 Each instruction in turn is subdivided into a sequence of
sub-cycles or phases
 Once the computer has been started (bootstrapped) it
continually executes instructions (until the computer is
stopped)

Compiled by Enshishu Ts. 17

 3.3 INSTRUCTION CYCLE…
 Different instructions take different amounts of time to
execute (typically)
 All instructions and data are contained in main memory
 A complete instruction consists of
 Operation code
 Addressing mode
 Zero or more operands
 Immediately available data (embedded within the instruction)
 The address where the data can be found in main memory

Compiled by Enshishu Ts. 18

3.4 INSTRUCTION CYCLE…

Compiled by Enshishu Ts. 19

 3.3 INSTRUCTION CYCLE…
 A computer goes through the following instruction
cycle repeatedly(Instruction Cycle Phases):
Do
1.Fetch an instruction from memory
2.Decode the instruction
3.Read the effective address from memory if the instruction has an
indirect address
4.Execute the instruction until a HALT instruction is encountered
=> “Fetch-Decode-Execute” cycle

Compiled by Enshishu Ts. 20

Instruction and Interrupt cycles

Interrupt Cycle

Instruction cycle

Interrupts Enabled
Interrupts Disabled
Fetch,
Fetch,decode
decode Execute
Execute Interrupt
Interrupt
START
START Next
Next
Instruction Instruction
Instruction cycle
cycle
Instruction

HALT
HALT

Compiled by Enshishu Ts. 21

 3.4 Memory Reference Instructions
 Since the data stored in memory cannot be processed directly (the
memory unit is not connected to the ALU), the actual execution in
the bus system require a sequence of microoperations
 (Note that T0-T2 for fetch an instruction; T3 for AR  M[AR] if
indirect memory addressing.
 Opcode (000 - 110) or the decoded output Di (i = 0, ..., 6) are used
to select one memory-reference operation out of 7.

Compiled by Enshishu Ts. 22

 3.4 MEMORY REFERENCE
INSTRUCTIONS…

In Memory reference instruction:

First 12 bits(0-11) specify an address.
Next 3 bits specify operation code (opcode)
Left most bit specify the addressing mode I
 I = 0 for direct address
 I = 1 for indirect address

(Opcode = 000 through 111)

Compiled by Enshishu Ts. 23

 3.4 MEMORY REFERENCE
INSTRUCTIONS…

In Memory reference instruction:

first 12 bits (0-11) specify an address.
The address field is denoted by three x’s (in hexadecimal notation)
and is equivalent to 12-bit address.
The last mode bit of the instruction represents by symbol I.
When I = 0, the last four bits of an instruction have a hexadecimal
digit equivalent from 0 to 6 since the last bit is zero (0).
When I = 1 the last four bits of an instruction have a hexadecimal
digit equivalent from 8 to E since the last bit is one (1).

Compiled by Enshishu Ts. 24

 3.5. COMPUTER REGISTERS
 Computer instructions are normally stored in consecutive memory
locations and executed sequentially one at a time
 The control reads an instruction from a specific address in memory
and executes it, and so on
 This type of sequencing needs a counter to calculate the address of
the next instruction after execution of the current instruction is
completed
 The computer needs processor registers for manipulating data and a
register for holding a memory address

Compiled by Enshishu Ts. 25

 3.5 COMPUTER REGISTERS,
(REGISTERS IN THE BASIC
COMPUTER)

Register Number Register Register

symbol of bits name Function-----------------------
DR 16 Data register Holds memory operands
AR 12 Address register Holds address for memory
AC 16 Accumulator Processor register
IR 16 Instruction register Holds instruction code
PC 12 Program counter Holds address of instruction
TR 16 Temporary register Holds temporary data
INPR 8 Input register Holds input character
OUTR 8 Output register Holds output character

Compiled by Enshishu Ts. 26

3.5 COMPUTER REGISTERS
(REGISTERS IN THE BASIC
COMPUTER)…

Compiled by Enshishu Ts. 27

 3.5. Computer Registers…
–Accumulator(AC) : takes input from ALU
»The ALU takes input from DR, AC and INPR :
»ADD DR to AC, AND DR to AC
–Note) Input register is not connected to the bus.
–The input register is connected only to the ALU

Compiled by Enshishu Ts. 28

 AND TO AC
 AND to AC: Logical AND operation between AC and the memory
word specified by AR.
 (Note that T0-T2 for fetch an instruction; T3 for AR  M[AR] if indirect
memory addressing.

 Need 2 more cycles for the AND logical operation since only DR
is connected to ALU.)
 D0T4: DR  M[AR]
 D0T5: AC  AC ˆ DR, SC  0
 SC – start counter
Compiled by Enshishu Ts. 29
 ADD TO AC

 ADD to AC: Arithmetic addition operation between AC and the memory word
specified by AR.
 D1T4: DR  M[AR]
 D1T5: AC  AC + DR, SC  0

Compiled by Enshishu Ts. 30

 LOAD TO AC
 LDA: Load to AC.
 (Need 2 cycles since AC input is not connected to the bus.)

 D2T4: DR  M[AR]
 D2T5: AC  DR, SC  0

Compiled by Enshishu Ts. 31

 STORE AC
 STA: Store AC.
 D3T4: M[AR]  AC, SC  0
 BUN: Branch unconditionally. Transfers the program to the instruction specified
by AR. (Note that the branch target must be in AR beforehand.)
 D4T4: PC  AR, SC  0

Compiled by Enshishu Ts. 32

 The end
Thank you

Compiled by Enshishu Ts. 33