This document discusses computer architecture and floating point representation. It provides:
1) An overview of floating point (arithmetic) representation according to the IEEE-754 standard, including bias and how exponents are calculated.
2) Examples of converting decimal numbers to IEEE-754 single and double precision format, including separating the sign, exponent, and fraction components.
3) An explanation of how floating point addition and multiplication are performed, including aligning decimals, adding/multiplying exponents and fractions, normalization, and rounding.
This document discusses computer architecture and floating point representation. It provides:
1) An overview of floating point (arithmetic) representation according to the IEEE-754 standard, including bias and how exponents are calculated.
2) Examples of converting decimal numbers to IEEE-754 single and double precision format, including separating the sign, exponent, and fraction components.
3) An explanation of how floating point addition and multiplication are performed, including aligning decimals, adding/multiplying exponents and fractions, normalization, and rounding.
This document discusses computer architecture and floating point representation. It provides:
1) An overview of floating point (arithmetic) representation according to the IEEE-754 standard, including bias and how exponents are calculated.
2) Examples of converting decimal numbers to IEEE-754 single and double precision format, including separating the sign, exponent, and fraction components.
3) An explanation of how floating point addition and multiplication are performed, including aligning decimals, adding/multiplying exponents and fractions, normalization, and rounding.
Khiyam Iftikhar Floating Point Representation (IEEE-754)
• Here Exponent is Exponent filled, So Exponent_Actual= Exponent_Filled – Bias
– So, Exponent_Filled=Exponent_Actual + bias • 32-bit (Single precision)
• 64-bit (Double precision)
Example 1 • .7510 in IEEE-754 format • .7510= .112 binary • First write in normalized scientific notation 7510 =1.1 x 2-1 • Now separating sign, exponent and fraction • (-1)0 x (1+.1) x 2Exp-Bias Here exponent – bias(i.e. 127) must be equal to -1 or Exp=-1+127=126 • = (-1)0 x (1+.1) x 2126-127 • 12610= 011111102 IEEE-754 • Bias for 32-bit is 127, and for 64-bit, it is 255 • Format ordering is designed such that it simplifies data comparison instructions e.g banch greater, branch less; and sorting. Example 2 Floating Point Addition • Align the decimal point of the smaller number. • Add the two fractions. • The sum will have the same exponent (of its components) multiplied to it. • Normalize the sum • Round the fraction to fit in the available space Example Floating point Addition Example Floating point Addition Floating Point Multiplication • Add the exponents and subtract the bias once – Because both bias will be added • Multiply the fractions • The multiplication result is fraction * added exponent • Normalize the result • Round off Multiplication example MIPS Floating-point Instructions Floating-point coprocessor • A co-processor which has its own – 32 registers $f0-$f31 each 32-bit wide – Two registers required for double precision, so only even numbered registers can hold double values. For example a double precision number can be stored at $f2 and $f3 – Eight condition code flags set by compare instructions and tested by branch (bclf or bclt) and conditional move instructions. MIPS Example code • A, B and C are variables stored on stack B=A+C Example Solution