Phase Locked Loop

&
Voltage Controlled Oscillator
By
Dr. Pallavi R. Mane
Professor, Dept. of ECE, MIT
 Phase locked Loop
❑ In 1930s PLL was used for radar synchronization
❑ To generate High Frequency Clock in Microprocessor.
❑ In Mobile Communication to generate Carrier
Frequency.
❑ Used for electronics frequency control
• in satellite communication systems,
• air borne navigational systems,
• FM communications etc.
 Phase locked Loop
❑ A circuit which synchronizes an adjustable oscillator
with another oscillator by the comparison of phase
between the two signals.

❑ An electronic circuit that synchronizes itself to an

external reference signal
 Block diagram of PLL

❑ Phase Detector: Is a multiplier that compares phase and

frequency of two input signals and produces output signal
with sum and difference frequency components.
❑ LPF: is used to remove the sum frequency components
obtained by Phase detector
❑ VCO: Is a free running multivibrator operates at a set
frequency and input dc voltage applied to it can shift its
frequency to either side of initial - free running frequency.
 Phase Detector
❑ The phase detector or comparator or multiplier compares the input
frequency fs with feedback frequency fO.
❑ The output of the phase detector is proportional to the phase difference
between fs & fO.
❑ The output of the phase detector is a dc voltage & therefore is often
referred to as the error voltage.
❑ The output of the phase detector is then applied to the LPF, which
removes the high frequency noise and produces a dc level Vc.
❑ This dc level Vc signal is input to the VCO which shift VCO frequency in a
direction to reduce the frequency difference between fs & fO.
❑ The VCO frequency is compared with input frequency and adjusted until
it is equal to the input frequencies.
 Three stages of PLL
❑ Free running: PLL is said to be in this state before the input is applied
❑ Capture: Once the input frequency is applied the VCO frequency starts
to change and PLL is said to be in the capture mode.
• The VCO frequency continuous to change until it equals the input
frequency and the PLL is in phase lock mode.
❑ Locked or Tracking: Once Phase locked, the loop tracks any change in
the input frequency through its repetitive action.
• If an input signal Vs of frequency fs is applied to the PLL, the PD
compares the phase & frequency of the input to that of the VCO
output vo.
• If the two signals differ in frequency and/or phase, an error voltage Ve
is generated.
 PLL: The Capture transient

• Capture
• Lock In or tracking range
• Pull in time

❑ Capture: The range of frequencies over which the PLL can

acquire lock with an input signal is called the capture range.
• This parameter is also expressed as percentage of fo.
❑ Lock In range or Tracking range: Once PLL is locked it tracks
any changes in input frequency.
❑ Pull in time: The total time taken by the PLL to establish lock.
• This time depends on (i) the initial phase and frequency
difference between the two signal of PD and (ii) on overall
loop gain and loop filter characteristics.
 Analog Phase Detector (Switch)

For Perfect lock Ve=0 occurs when phase must be 90 degrees.

Balanced Modulator Full wave switching
Phase Detector

Vs Vo On Qs Ve
-1 -1 Q2,Q -
5 IER
L
-1 1 Q2,Q IER
6 L
1 -1 Q1,Q IER
4 L
1 1 Q1, -
 Balanced Modulator Full wave switching
Phase Detector

❑ is the Phase angle to voltage transfer coefficient or also

called as conversion ratio of the phase detector.
 Digital Phase detector: XOR Gate

❑ Conversion ratio of the phase detector for Vcc=5V is

 Voltage-Controlled Oscillator:
❑ The VCO is the most widely circuit to produces an oscillatory output
voltage whose frequency is controlled by dc input voltage .
❑ It provides a periodic signal, where the frequency of the periodic signal is
related to the level of an input voltage control signal supplied to the VCO.
❑ A VCO is simply an oscillator having a frequency output that is
proportional to an applied voltage.
❑ The centre frequency also called free running frequency of a VCO is the
frequency of the periodic output signal formed by the VCO when the input
❑ control voltage is set to a nominal level.
 Voltage-Controlled Oscillator: IC 566

❑ Voltage at pin 6 is held same as pin 5,

❑ A Capacitor is charged and discharged by a constant source and sink
❑ Amount of current is controlled by Vc (pin 5) or changing RT
❑ The Voltage swing of Schmitt trigger is designed to Vcc to 0.5Vcc & Ra = Rb
 Voltage-Controlled Oscillator:
❑ Voltage at pin 6 is held same as pin 5,
❑ A Capacitor is charged and discharged by a constant source and sink
❑ Amount of current is controlled by Vc (pin 5) or changing RT
❑ The Voltage swing of Schmitt trigger is designed to Vcc to 0.5Vcc &
Ra = Rb
❑ The output frequency can then be changed by three methods:
1. Changing the value of CT.
2. Changing the value of RT.
3. Changing the voltage at the modulating input terminal.
 Voltage-Controlled Oscillator:

❑ For best operation, the value of RT should be between 2 kΩ to 20 kΩ

❑ The range of allowable variation of modulating signal is from 0.75Vcc to
Vcc for fo variation about 10 to 1.

❑ Hence with pin 5 biased at 7/8Vcc and Unmodulated output

frequency is
 VCO: V/F conversion factor
❑ A Parameter of importance for VCO is V/F frequency conversion factor
❑ Defined as

❑ A Parameter ΔVc is the modulation voltage required to produce frequency

shift Δfo for a VCO.
❑ Assume f0 : original freq. & f1: new freq. then

❑ Substitute for RTCT =0.25/f0from earlier equation

 PLL: IC 565

❑ PLL in open loop, that is Pin 4 and pin 5 are not shorted there is output
only to due to VCO.
❑ Input pin 2 & 3 when grounded, output square waveform of VCO as
discussed earlier has free running frequency

❑ For best operation, the value of RT should be between 2 kΩ to 20 kΩ

 PLL: IC 565 Lock Range
❑ The voltages of Phase detector output is limited to +0.7 and -0.7
voltage levels. Output voltage of PD is given &
❑ This voltage is passed through amplifier with Gain A=1.4 & LPF with
cutoff frequency as specified by R=3.6kΩ (fixed internally), and C. It has

❑ For LOCK Range analysis: T(if)=1

❑ The input to VCO=Vc=Ve*A*T(if)
❑ The maximum PD O/P voltage occurs at phase=180 or 0 i.e
❑ Control voltage max to VCO is
❑ Hence the VCO adjusts its frequency to new frequency
and

The maximum range of frequency over which PLL stays locked is

 PLL: IC 565 Capture range
❑ For LOCK Range analysis: LPF will be operating near /in cut off range
where TF is approximated to
❑ The maximum PD O/P voltage occurs at phase=180 or 0 i.e
❑ Control voltage max to VCO is

❑ The maximum range of frequency that can be captured by PLL

PLL: Capture and Lock Range