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IT-2205 Lec 03 Error Detection & Correction-1
IT-2205 Lec 03 Error Detection & Correction-1
IT-2205 Lec 03 Error Detection & Correction-1
for
2nd Year 2nd Semester of B.Sc (Honors) in IT
Lecture: 03
Error Detection
Prepared by:
K M Akkas Ali
akkas_khan@yahoo.com, akkas@juniv.edu
Associate Professor
Institute of Information Technology (IIT)
Jahangirnagar University, Dhaka-1342
Lecture-03: Error Detection
Slide-2
Introduction to Error Detection & Correction
Networks must be able to transfer data from one
device to another with acceptable accuracy.
In most cases, it is expected that the data received are
identical to the data transmitted.
Slide-3
Error Control
Error controls are techniques that enable reliable
delivery of digital data over unreliable
communication channels.
Error control process has two components:
1. Error Detection
Error detection techniques allow detecting errors caused
by noise or other impairments during transmission of data
from the transmitter to the receiver.
2. Error Correction
Error correction enables reconstruction of the original
data.
The correction of errors is more difficult than the
detection.
Error detection and correction are implemented either
at the data link layer or the transport layer of the OSI
model.
Slide-4
Error Detection Vs. Error Correction
In error detection, we are looking only to see if any
error has occurred. The answer is a simple yes or no.
We are not even interested in the number of errors. A
single-bit error is the same for us as burst error.
Error detection uses the concept of redundancy, which
means adding extra bits for detecting errors at the
destination.
In error correction, we need to know the exact number
of bits that are corrupted and more importantly, their
location in the message. The number of errors and the
size of message are important factors.
If we need to correct one single error in an 8-bit data unit, we
need to consider eight possible error locations; if we need to
correct two errors in a data unit of the same size, we need to
consider 28 possibilities.
Slide-5
Types of Errors
Whenever bits flow from one point to another,
they are subject to unpredictable changes
because of interference which can change the
shape of the signal.
2. Retransmission:
Retransmission is a error correction technique in
which the receiver detects the occurrence of an error
and asks the sender to resend the message.
Resending is repeated until a message arrives that
the receiver believes is error-free.
Slide-10
Error Detection: Example
Suppose a computer sends a frame to another computer
on a bus topology Local Area Network (LAN). The
physical destination address of the frame is corrupted
during the transmission. What happens to the frame?
How can the sender be informed about the situation?
Answer:
If the corrupted destination address does not match
any station address in the network, the packet is lost. If
the corrupted destination address matches one of the
stations, the frame is delivered to the wrong station. In
this case, however, the error detection mechanism,
available in most data link protocols, will find the error
and discard the frame. In both cases, the source will
somehow informed using one of the data link control
mechanisms
Slide-11
Error Detection Methods
If only data is transmitted, errors cannot be detected. So,
more information needs to be sent along with data that
satisfies a special relationship, i.e. add redundancy to
original data. Some commonly used error-detection
methods are:
1. Repetition code method
2. Checksum method
3. Parity bit method
VRC (vertical redundancy check: even or odd parity VRC)
HRC (horizontal redundancy check)
LRC (longitudinal redundancy check: even or odd parity
LRC)
4. CRC (cyclic redundancy check) method
Slide-12
Redundancy
The general idea for achieving error detection
and correction is to add some redundancy (i.e.,
some extra data) to a message, which receivers
can use to check consistency of the delivered
message, and to recover data determined to be
erroneous.
In general, the larger the amount of redundancy sent
with the message, the greater the ability to detect an
error.
Redundancy is achieved through various coding
schemes, e.g., block coding, convolution coding etc.
Slide-13
Redundancy
Slide-14
Types of Redundancy Check
Four types of redundancy checks are used
in data communications:
Slide-15
Error Detection Method: Code Repetition
A repetition code is an error-correcting coding
scheme that repeats the bits across a channel to
achieve error-free communication.
Given a stream of data to be transmitted, the data is
divided into blocks of bits. Each block is transmitted some
predetermined number of times.
For example, to send the bit pattern "1011", the four-bit
Slide-17
Error Detection Method: Checksum
The concept of checksum is illustrated with
examples:
Example-1:
Suppose our data is a list of five 4-bit numbers that we
result with the sum. If the two are the same, the
receiver assumes no error, accepts the five numbers,
and discards the sum. Otherwise, there is an error
somewhere and the data are not accepted.
Slide-18
Error Detection Method: Checksum
Example-2:
To send the same data stated in example-1, the
Slide-19
Error Detection Method: Checksum
Example-3:
To send the same data stated in example-1, one’s
Slide-20
Error Detection Method: Checksum
Sender Site: Receiver Site:
The sender initializes the The receiver follows the same
checksum to 0 and adds all data procedure as the sender.
items and the checksum (the It adds all data items
checksum is considered as one (including the checksum); the
data item and is shown in color). result is 45.
the result is 36. Since, 45 cannot be expressed
Since, 36 cannot be expressed in in 4 bits, the sum is wrapped
4 bits. The extra two bits are and becomes 15.
wrapped and added with the sum
The wrapped sum is
to create the wrapped sum value complemented and becomes
0.
6. Since the value of the
The sum is then complemented,
checksum is 0, this means that
resulting in the checksum value 9 the data is not corrupted.
(15 − 6 = 9). The receiver drops the
The sender now sends six data checksum and keeps the other
items to the receiver including the data items.
checksum 9. If the checksum is not zero,
the entire packet is dropped.
Slide-21
Error Detection Method: Checksum
Sender Site: Receiver Site:
1. The message is divided into 1. The message (including
16-bit words. checksum) is divided into
2. The value of the checksum 16-bit words.
word is set to 0. 2. All words are added using
3. All words including the one’s complement addition.
checksum are added using 3. The sum is complemented
one’s complement addition. and becomes the new
4. The sum is complemented and checksum.
becomes the checksum. 4. If the value of checksum is
5. The checksum is sent with the 0, the message is accepted;
data. otherwise, it is rejected.
Slide-22
Error Detection Method: Internet Checksum
The 16-bit checksum is used in the Internet by several
protocols. Rules for calculating checksum on the sender
and receiver sides, and detecting error are given below.
Sender site:
1. The message to be sent is divided into 16-bit
words.
2. The value of the checksum word is set to 0.
3. All data words including the checksum are added
using 1’s complement addition.
4. The sum is complemented and becomes the
checksum that is to be attached to the message.
5. The checksum is sent with the data.
Slide-23
Error Detection: Internet Checksum
Receiver site:
1. The message (including checksum) is divided into
16-bit words.
2. All words are added using one’s complement
addition.
3. The sum is complemented and becomes the new
checksum.
4. If the value of checksum is 0, the message is
accepted; otherwise, it is rejected.
Slide-24
Error Detection Method: Checksum
Example-4:
Suppose, a transmitter wants to transmit the following
text to a receiver:
ASIFF KHAN
At the sender’s site:
1. The text ASIFF KHAN needs to be divided into 16-bit
words. We use ASCII code of each character which is a
2-digit
hexadecimal
number (i.e. 8-
bit). So, to divide
the message into
16-bit words, we
use two
characters.
Slide-25
Error Detection Method: Checksum
16-bit words of the message is:
Slide-26
Error Detection Method: Checksum
3. All data words including the checksum word are
added using 1’s compliment addition.
Slide-27
Error Detection Method: Checksum
4. 5D4F is the final sum. Recompliment the sum, i.e.
calculate its 15’s compliment which will be the
checksum to be sent with the message.
5 D 5 0 (Sum, final)
A 2 A F (15’s compliment of the sum. This is the
checksum)
5. The checksum to be sent with the message is: A 2 A
F.
Slide-28
Error Detection Method: Checksum
At the receiver’s site:
1. The message receiver will receive including the
checksum is:
Slide-29
Error Detection Method: Checksum
2. All data words including the checksum word are
added using 1’s compliment addition.
Slide-30
Error Detection Method: Checksum
3. F F F F is the final sum. Recompliment the sum, i.e.
calculate its 15’s compliment which will be the
checksum on the receiver site.
F F F F (Sum, final)
0 0 0 0 (15’s compliment of the sum. This is
the checksum on the receiver site)
Slide-31
Error Detection: Checksum
Limitations of Checksum:
Checksum method will not find the error if
Equal number of 0s and 1s are replaced
This happens as Checksum works with the sum only
Slide-32
Error Detection: Cyclic Redundancy Check (CRC)
A cyclic redundancy check (CRC) is a powerful
and most common error-detection technique. It
is designed to detect accidental changes to
digital data in computer networks.
Slide-33
Error Detection: Cyclic Redundancy Check (CRC)
CRC can be described as follows:
Given k message bits, the transmitter generates n bits
of redundancy known as FCS (frame check sequence).
The resulting frame consists of k+n bits. If P is a
predetermine pattern of n+1 bits, then the resulting
frame is exactly divisible by P. The receiver then
divides the incoming frame by the pattern P. If there is
no remainder, it is assumed that there was no error in
the received data.
Let us assume that:
M= k-bit message
n= n-bits redundancy
T= (k+n)-bit frame to be transmitted, with n<k
F= n-bit FCS, the last n bits of T
P= pattern of n+1 bits, this is the predetermined
Slide-34 divisor
Error Detection: Cyclic Redundancy Check (CRC)
Rules for detecting errors by CRC using modulo
2 Arithmetic:
1. Multiply the message M by 2n. This will shift the message to the left by
n bits and padded out the result with n zeros.
2. Divide the above product 2nM by predetermined pattern P using
modulo 2 divisions. There is a quotient Q and a remainder R in the
result (R is always at least one bit shorter than the divisor P). The
group of bits in R, which is sometimes called syndrome of frame
check sequence (FCS), is appended to the end of the transmitted
data
3. Ignore the quotient and keep the remainder R as FCS.
4. Concatenate 2nM with R to give T=2nM+R, where T is the message
frame the receiver will receive.
5. Divide the received message frame T by P.
6. Accept the message if remainder is zero, otherwise reject.
Slide-35
Error Detection: Cyclic Redundancy Check (CRC)
Example of CRC code using modulo 2 arithmetic:
Suppose we want to transmit the message string: 1010001101.
The receiver and sender decide to use the divisor pattern :
110101.
At transmitter side:
Given
1. The message string is shifted left by one position less than the
number of position in the divisor (i.e. 5 bits in this case). This is
achieved by multiplying the message by 25, which yields
101000110100000
2. To find out remainder, the above product is divided by P using
Slide-36modulo 2 divisions.
Error Detection: Cyclic Redundancy Check (CRC)
Slide-37
Error Detection: Cyclic Redundancy Check (CRC)
1. The remainder R is 01110 which is the FCS or syndrome.
2. This remainder is added (concatenated) to 2nM to give
T= 101000110101110
3. Divide T by P, which yields R=0
must be 1.
In CRC, the receiver will fail to detect an error if and
Slide-40
Error Detection: Parity Bit Method
Two variations on the parity bit mechanism are:
1. Horizontal Redundancy Checks (HRC)
2. Vertical Redundancy Checks (VRC)
011001101100110
011000101100011
Slide-41
Error Detection: Parity Bit Method VRC
Performance:
VRC can detect all single-bit errors.
It can detect multiple bit or burst errors also if the
Slide-42 total number of errors is odd.
Error Detection: Parity Bit Method LRC
Longitudinal Redundancy Check (LRC)
LRC was developed to overcome the problem with low
probability of detecting errors in parity method.
It organizes data into a table and creates parity for each
column.
Parity bits of all positions are assembled into a new data
unit called BCC (block check character), which is added
to the end of the data block.
Slide-43
Error Detection: Parity Bit Method
Example: LRC
Suppose we want to send the message “snow”
using even parity and LRC with 7-bit ASCII
Slide-44
Error Detection: Parity Bit Method
Performance:
• Detects all burst errors up to length n (n= no. of columns).
• Misses burst errors of length n+1 if there are n-1 uninverted bits
between the first and last bit
• If the block is badly garbled, the probability of acceptance is
(½)n.
Slide-45