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Basic Electrical and Electronics Engineering Lab
Basic Electrical and Electronics Engineering Lab
Basic Electrical and Electronics Engineering Lab
Component/part in
S.No Value Path in the directory
ORCAD
1 DC Voltage source 100V PSPICE\SOURCE\VDC
2 5 ohms
3 10 ohms
4 Resistors 20 ohms PSPICE\ANALOG\R
5 25 ohms
6 50 ohms
7 Ground 0V Place >> Ground
resistance, RTH.
VIT – Recognised as Institution of Eminence (IoE) by Government of India.
Procedural Steps for obtaining Thevenin circuit
1. Remove the load resistor (RL) and keep the terminals open.
2. Analyze the circuit to find the voltage across open terminals of
the load resistance (open circuit voltage).
3. The voltage across open terminals of the load resistance is called
Thevenin’s voltage.
Vab = 97.5V
RTH = 4.25Ω
1. Create the given circuit diagram in new project file using the
general procedure and remove the interested branch.
2. Replace the default component value and source value as per
given circuit diagram.
3. Create the New simulation profile and set analysis type as Bias
point.
4. Run the simulation and note down the bias voltage across the
removed branch open terminals.
5. The obtained voltage is Thevenin’s voltage, VTH .