Operating Systems

Fixed/Variable
Partitioning
 Contiguous Allocation
 An executing process must be loaded entirely in main memory (if
overlays are not used).
 Main memory is usually split into two (Memory split) or more
(Memory division) partitions:
Resident operating system, usually held in low memory partition
with interrupt vector.
User processes then held in high memory partitions.
 Relocation registers used to protect user processes from each other,
and from changing OS code and data:
Base register contains value of smallest physical address.
Limit register contains range of logical addresses:
each logical address must be less than the limit register.
MMU maps logical address dynamically.
2
 Real Memory Management Techniques
 Although the following simple/basic memory management
techniques are not used in modern OSs, they lay the ground for a
later proper discussion of virtual memory:

Fixed/Static Partitioning

Variable/Dynamic Partitioning

Simple/Basic Paging

Simple/Basic Segmentation

3
 Fixed Partitioning
 Partition main memory into a

set of non-overlapping memory

regions called partitions.
 Fixed partitions can be of equal

or unequal sizes.
 Leftover space in partition,
after program assignment, is
called internal fragmentation.

Fig. 3.13 Equal-size Vs. unequal-size

Partitions
 Placement Algorithm with
Partitions

A. Equal-size partitions:
If there is an available partition, a process can be loaded
into that partition:
Because all partitions are of equal size, it does
not matter which partition is used.
If all partitions are occupied by blocked processes, choose
one process to swap out to make room for the new process.

5
 Contd.
B. Unequal-size partitions using
multiple queues
 assign each process to the smallest
partition within which it will fit.
 a queue exists for each partition size.
 Tries to minimize internal fragmentation.
problem: some queues might be empty
while some might be loaded.
Solutions: Have at least one small
partition around.
 Such a partition will allow small jobs to
run without having to allocate a large
partition for them.
 Have a rule stating that a job that is
eligible to run may not be skipped over Fig. 3.14 Unequal-size
more than k times. Partitions using Multiple
queues
 Contd.
C. Unequal-size partitions using
single queue:
 when it’s time to load a process

into memory, the smallest

available partition that will hold
the process is selected.
 increases the level of
multiprogramming at the expense
of internal fragmentation.

Fig. 3.15 Unequal-size

Partitions using single queues
 Dynamics of Fixed Partitioning
 Any process whose size is less than or equal to a partition size can
be loaded into the partition.
 If all partitions are occupied, the OS can swap a process out of a
partition.
 A program may be too large to fit in a partition. The programmer
must design the program with overlays.
 Main memory use is inefficient. Any program, no matter how small,
occupies an entire partition. This can cause internal fragmentation.
 Unequal-size partitions lessens these problems but they still
remain ...
 Equal-size partitions was used in early IBM’s OS/MFT
(Multiprogramming with a Fixed number of Tasks).
8
 Variable Partitioning
 When a process arrives, it is allocated memory from a hole
large enough to accommodate it.
 Hole – block of available memory; holes of various sizes are
scattered throughout memory.
 Operating system maintains information about:
a) allocated partitions b) free partitions (holes)
OS OS
OS OS
process 5 process 5
process 5 process 5
process 9
process 9
process 10
process 8

process 2 process 2
process 2 process 2

Fig. 3.16
9 Variable(dynamic)Partitions
 Managing allocated and free partitions
Example: memory with 5 processes and 3 holes:
tick marks show memory allocation units.
shaded regions (0 in the bitmap) are free.

Fig. 3.17 Memory management using bitmaps

10
 Memory Management with Linked Lists

Fig. 3.18 Memory management using Linked

11
lists
 Variable Partitioning: example (1)

 A hole of 64K is left after loading 3 processes: not

enough room for another process.
 Eventually each process is blocked. The OS swaps out
process 2 to bring in process 4 (128K).
12
 Example 2

 Another hole of 96K is created.

 Eventually each process is blocked. The OS swaps out process 1
to bring in again process 2 and another hole of 96K is created ...
13
 Internal/External Fragmentation
 There are two types of fragmentation:

1. Internal Fragmentation:- allocated memory may be slightly

larger than requested memory; this size difference is memory

internal to a partition, but not being used.
 This is when memory is handed out in some fixed way and
requesting program doesn't use it all.

2. External Fragmentation:- total memory space exists to satisfy a

size n request, but that memory is not contiguous.

 This occurs when there are many small pieces of free memory.

14
 Reducing External Fragmentation
Reduce external fragmentation by doing compaction:

 Shuffle memory contents to place all free memory together

in one large block (or possibly a few large ones).

 Compaction is possible only if relocation is dynamic, and is

done at execution time.

Total memory space may exist to satisfy a request but it is not

contiguous.
 Compaction reduces external fragmentation by shuffling memory

contents to place all free memory together in one large block.

15
 Comments on Variable Partitioning
 Partitions are of variable length and number.

 Each process is allocated exactly as much memory as it

requires.
 Eventually holes are formed in main memory. This can cause

external fragmentation.
 Must use compaction to shift processes so they are

contiguous; all free memory is in one block.

 Used in IBM’s OS/MVT (Multiprogramming with a Variable

16
number of Tasks).
 Dynamic Storage-Allocation Problem
 Satisfy request of size n from list of free holes: four basic
methods:
 First-fit: Allocate the first hole that is big enough.
 Next-fit: Same logic as first-fit but starts search always
from the last allocated hole (need to keep a pointer to this)
in a wraparound fashion.
 Best-fit: Allocate the smallest hole that is big enough; must
search entire list, unless ordered by size.
 Produces the smallest leftover hole.
 Worst-fit: Allocate the largest hole; must also search entire
list.
17  Produces the largest leftover hole.
Placement Algorithm
 Used to decide which free
block to allocate to a process.
 Goal: to reduce usage of
compaction procedure (Its
time consuming).
 Example algorithms:
First-fit
Next-fit
Best-fit
Fig.
Worst-fit (not recommended)? 3.19
 Comments on Placement Algorithm
 First-fit favors allocation near the beginning: tends to
create less fragmentation then Next-fit.
 Next-fit often leads to allocation of the largest block at
the end of memory.
 Best-fit searches for smallest block: the fragment left
behind is small as possible:
Main memory quickly forms holes too small to hold any
process: compaction generally needs to be done more often.
Slower in speed compared to First/Next-fit.

 First/Next-fit and Best-fit better than Worst-fit (name is

19
fitting) in terms of speed and storage utilization.
 Replacement Algorithm

 When all processes in main memory are blocked, the OS must

choose which process to replace:

 A process must be swapped out (to a Blocked-Suspend state)

and be replaced by a process from the Ready-Suspend queue

or a new process.

20
 Knuth’s Buddy System
 The buddy memory allocation technique is a memory allocation
algorithm that divides memory into partitions to try to satisfy a
memory request as suitably as possible.
 This system makes use of splitting memory into halves to try to
give a best-fit.
Implementation and Consequences
 Is relatively easy compared to the memory allocation techniques
that modern operating systems use.
 Has little external fragmentation compared to other simpler
techniques such as dynamic allocation and has little overhead
trying to do compaction of memory.
 It may generate a moderate amount of internal fragmentation.
21
 How it works?
 The buddy memory allocation technique allocates memory in powers
of 2, i.e. 2x, where x is an integer.
 Thus, the programmer has to decide on, or to write code to obtain, the
upper limit of x.
 For instance, if the system had 2000K of physical memory, the upper
limit on x would be 10, since 210 (1024K) is the biggest allocatable
block.
 This results in making it impossible to allocate everything in a single
chunk; the remaining 976K of memory would have to be taken in
smaller blocks.
 Memory blocks are available in size of 2^{K} where L <= K <= U
and where:
 2^{L} = smallest size of block allocatable.
 2^{U} = largest size of block allocatable .
22
 Contd.
 After deciding on the upper limit, the programmer has to decide
on the lower limit, i.e. the smallest memory block that can be
allocated.
This lower limit is necessary so that the overhead of storing used and
free memory locations is minimized.
Typically this number would be a moderate number (like 2, so that
memory is allocated in 2² = 4K blocks), small enough to minimize
wasted space, but large enough to avoid excessive overhead.
 Now that we have our limits, let us see what happens when a
program makes requests for memory. Let's say in this system, L =
7, which results in blocks 27 = 128K in size, and U= 10, which
results in a largest possible allocatable block, 210 = 1024K in size.
23
  The following shows a possible state of the system after various
memory requests.

24
 Dynamics of Buddy System
 We start with the entire block of size 2^{U}.
 When a request of size S is made:
 If 2^{U-1} < S <= 2^{U} then allocate the entire block of size 2^{U}.
 Else, split this block into two buddies, each of size 2^{U-1}.
 If 2^{U-2} < S <= 2^{U-1} then allocate one of the 2 buddies.
 Otherwise one of the 2 buddies is split again.

 This process is repeated until the smallest block greater or equal to S is generated.
 Two buddies are coalesced whenever both of them become unallocated.
 The OS maintains several lists of holes:
 the i-list is the list of holes of size 2^{i}.
 whenever a pair of buddies in the i-list occur, they are removed from that list
and coalesced into a single hole in the (i+1)-list.
 Presented with a request for an allocation of size k such that 2^{i-1} < k <=
2^{i}:
 the i-list is first examined.
25  if the i-list is empty, the (i+1)-list is then examined ...
 Comments on Buddy System
 Mostly efficient when the size M of memory used by the

Buddy System is a power of 2:

M = 2^{U} “bytes” where U is an integer.

then the size of each block is a power of 2.

the smallest block is of size 1.

 On average, internal fragmentation is 25%

each memory block is at least 50% occupied.

26
Operating Systems

Simple/Basic Paging
 Simple/Basic Paging
 Idea: logical address space of a process can be made noncontiguous;
process is allocated physical memory wherever it is available.
 Divide physical memory into relatively small, equal sized blocks
called frames (size is power of 2, usually between 512 bytes and
8192 bytes).
 Each process is also divided into blocks of the same size called
pages.
 The system keeps track of all free frames.

 The process pages can thus be assigned to any available frames in

main memory; a process does not need to occupy a contiguous
28
portion of physical memory.
 Basic Paging Architecture
 A page table translates logical address to physical Address.

 No external fragmentation but small Internal fragmentation is

possible (for page at end of program).

Fig. 3.20 Basic paging

29
architecture
 Example of Paging
 Each process has its own page table.

 Page table is kept in memory.

 Page table base register points to the

page table.
 Page table length register indicates the

size of the page table.

 How many physical memory access are

required for each logical memory access?

 Answer: two (one for the page table and
Fig. 3.21 An example on how paging
works one for the data/instruction).
 Can we do better? Yes how? Using TLB
30
 Translation Look-aside Buffers(TLB)
 Also called Associative register.

 It is a CPU cache that MMU hardware uses to improve virtual

address translation speed.
 It consists of a small number of entries.

 Each entry contains information about one page, including the

virtual page number, a bit that is set when the page is modified, the
protection code (read/write/execute permissions), and the physical
page frame in which the page is located.
 Otherwise get frame number from page table in memory.

31
 Simple/Basic Paging
 To run a program of size n pages, need to find any n free frames and load all
the program (pages).
 So need to keep track of all free frames in physical memory; use free-frame list.

Before allocation After allocation

32
 Example of processes loading

Now suppose that process B is swapped out.

33
 Contd.
 When process A and C are blocked,

the pager loads a new process D of

5 pages.
 Process D does not occupy a
contiguous portion of memory.
 There is no external fragmentation.

 Internal fragmentation can happen

only in the last page of each

process.
 Contd.

 The OS now needs to maintain (in main memory) a page table

for each process.

 Each entry of a page table consists of the frame number where

the corresponding page is physically located.

 The corresponding page table is indexed by the page number to

obtain the frame number.

 A free frame table/list, of available pages, is maintained.
35
 Logical address in paging
 The logical address becomes a relative

address when the page size is a power of 2.

 Example: if 16 bits addresses are used and

page size = 1K, we need 10 bits for offset

and have 6 bits available for page number.
 Then the 16 bit address, obtained with the

10 least significant bits as offset and 6 most

significant bits as page number, is a location
relative to the beginning of the process.
 Contd.
 Within each program, each logical address must consist of a page
number and an offset within the page.
 A dedicated register always holds the starting physical address of the
page table of the currently running process.
 Presented with the logical address (page number, offset) the processor
accesses the page table to obtain the physical address (frame number,
offset).

37 Fig Logical-to-Physical Address Translation in Paging

 Address Translation Scheme
 Logical address generated by CPU is divided into two parts:
 Page number (p): used as an index into a page table which contains the
base address of each page in physical memory.
 Page offset/displacement (d): combined with base address to define the
physical memory address that is sent to the memory unit.
 For given logical address space 2 m and page size 2n.

 By using a page size of a power of 2, the pages are invisible to

the programmer, compiler/assembler, and the linker.
 Address translation at run-time is then easy to implement in
hardware:
 logical address (p, d) gets translated to physical address (f, d) by indexing
the page table with p and appending the same displacement/offset d to
38 the frame number f.
 Address Translation
Architecture Example on Paging

39
 How to implement Page Table?
1. Keep Page Table in main memory:
 Page-table base register (PTBR) points to the page table.
 Page-table length register (PTLR) indicates size of the page
table.
 However, in this scheme, every data/instruction access requires two
memory accesses, one for the page table and one for the
data/instruction.
2. Keep Page Table in hardware (in MMU): however, page table can be large,
too expensive.
3. Use a special fast-lookup hardware cache called Associative Memory
(Registers) or Translation Look-aside Buffer (TLB)
 If p is in associative register, get frame # out.
 Otherwise get frame # from page table in memory.
40
 Flow chart for
Paging Hardware With TLB TLB

The TLB must be flushed each time a new process enters the
41
running state.
 Effective Access Time (EAT)
Suppose:
 TLB lookup takes 5 nano sec.

 Memory access time is 100 nano sec.

 Hit ratio, , be percentage of times that a page number is

found in the associative memory.

EAT = *(5+ 100) + (5+100+100)* (1 – )

 Suppose =80% then what will be EAT?

EAT = .8*(5+ 100) + (5+100+100)* (1 –0.8)= 125 nano secs.

42
 Memory Protection
 Is a way to control memory access rights on a computer, and is a part of most
modern operating systems.
 The main purpose of memory protection is to prevent a process from accessing
memory that has not been allocated to it.
 This prevents a bug within a process from affecting other processes, or the
operating system itself..
 Memory protection implemented by associating a protection bit with each frame.

 Valid-invalid bit attached to each entry in the page table:

 “valid” indicates that the associated page is in the process’ logical address space,

and is thus a legal page.

 “invalid” indicates that the page is not in the process’ logical address space.

43
 Contd.

Valid(v) or invalid(i) bit in a page )a( Transfer of a Paged Memory to )b(

table Contiguous Disk Space

44
 Shared Pages
1. Shared code:
 One copy of read-only (reentrant) code shared among processes (i.e., text
editors, compilers, window systems).
 Shared code must appear in same location in the logical address space of all
processes.
2. Private code and data:
 Each process keeps separate copy of code and data.
 The pages for the private code and data can appear anywhere in the logical
address space.

Sh
ar
Ex ed
am Pag
pl es
e

45
 Page Table Types
 Essentially, a page table must store the virtual address, the
physical address, and possibly some address space
information like a bit that is set when the page is modified,
the protection code (read/write/execute permissions).
 There are several different types of page tables, that are
best suited for different requirements.
1. Inverted Page Tables
2. Multilevel Page Tables
3. Virtualized Page Table
4. Nested Page Tables
46
 1. Inverted Page Table(IPT)
 Traditional page tables require one entry per virtual page, since they
are indexed by virtual page number.
 As virtual address spaces grow so much bigger than physical
addresses, it becomes possible that we can save space and time by
inverting the page table, mapping physical to virtual, instead of the
other way around.
 ITE decreases memory needed to store each page table, but increases
time needed to search the table when a page reference occurs.
 Although inverted page tables save vast amounts of space, they have
a serious downside: virtual-to-physical translation becomes much
harder and time consuming.
 Use hash table to limit the search to one, or at most a few, page table
entries.
47
 Contd.
 Then, each inverted Page table entry (IPTE) has to contain:
The process ID of the owning process.
The virtual page number.
A pointer to the next IPTE in the hash chain.
The normal protection, valid, modified bits referenced.

48
 Contd.
The steps in a translation are:
1. Hash the process ID(PID) and virtual page
number (VPN) to get an index into the HAT
(hash anchor table).
2. Look up a Physical Frame Number in the HAT.
3. Look at the inverted page table entry, to see if it
is the right PID and VPN. If it is, you're done.
4. If the PID or VPN does not match, follow the
pointer to the next link in the hash chain.
Again, if you get a match then you're done; if
you don't, then you continue.
 Eventually, you will either get a match or you
will find a pointer that is marked invalid. If you
get a match, then you've got the translation; if
you get the invalid pointer, then you have a
miss.
49
 Multilevel Page Tables
 Also known as hierarchical page tables.
 Is a means of using page tables for large address spaces.
 Instead of having a table which keeps a listing of mappings for all frames
in physical memory, in case of IPT, we could create a page table structure
that contains mappings for virtual pages.
 Break up the logical address space into multiple page tables.
 Each of these smaller page tables are linked together by a master page
table, effectively creating a tree data structure.
 The secret to the multilevel page table method is to avoid keeping all the
page tables in memory all the time.
 A virtual address in this schema could be split into three, the index in the
root page table, the index in the sub-page table, and the offset in that
50
page.
Two-Level Page-Table Scheme Two-Level Page-Table
Example

Second-
level page
51 tables
 Two-Level Paging
Example
 A logical address (on 32-bit machine with 1K page size) is divided into:
 a page number consisting of 22 bits
 a page offset consisting of 10 bits
 Since the page table is paged, the page number is further divided into:
 a 12-bit page number
 a 10-bit page offset
 Thus, a logical address is as follows:

page number page offset

pi p2 d
12 10 10
where pi is an index into the outer page table, and p2 is the displacement within the
page of the outer page table

52
 Three-level Paging Scheme (64-bit)

Examples: 32-bit SPARC (three-level), 32-bit Motorola 68030

(four-level)

53
 Virtualized Vs. Nested Page Tables
 It was mentioned that creating a page table structure that contained
mappings for every virtual page in the virtual address space could end
up being wasteful.
 But, we can get around the excessive space concerns by putting the
page table in virtual memory, and letting the virtual memory system
manage the memory for the page table.
 However, part of this linear page table structure must always stay
resident in physical memory, in order to prevent against circular page
faults, that look for a key part of the page table that is not present in
the page table, which is not present in the page table, etc.
 Nested page tables can be implemented to increase the performance
of hardware virtualization.
54