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Introduction To Microprocessor & Microcomputers
Introduction To Microprocessor & Microcomputers
1
What is microprocessor ?
•Microprocessor is multipurpose programmable integrated logic
circuit.
•It is used as central processing unit (CPU) of a general purpose
microcomputer system.
2
General architecture of a microcomputer
system
Memory
Primary Memory
Secondary
3
Evolution of intel microprocessor
Architecture
The 4-bit processors
4
The 8-bit processors
Intel 8080:
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8-bit processors continude…
Intel 8085 :
• Introduced in 1976
• Clock rate 3 MHz
• 0.37 MIPS
• Bus Width 8 bits data, 16 bits address
• Depletion load NMOS logic
• Number of Transistors 6,500 at 3 µm
• Binary compatible downwards with the 8080.
• Used in Toledo scales. Also was used as a computer peripheral
controller – modems, hard disks, printers, etc...
• High level of integration, operating for the first time on a single 5
volt power supply, from 12 volts previously.
7
The 16-bit processors: origin of x86
Intel 8086/8088:
• Introduced June 8, 1978
• Clock rates:
4.77 MHz with 0.33 MIPS
8 MHz with 0.66 MIPS
• The memory is divided into odd and even banks. It accesses both the banks
simultaneuosly in order to read 16 bit of data in one clock cycle.
• Used in portable computing, and in the IBM PS/2 Model 25 and Model 30.
Also used in the AT&T PC6300 / Olivetti M24. 8
16-bit processors………
8088
• Introduced June 1, 1979
• Clock rates:
– 4.77 MHz with 0.33 MIPS
– 8 MHz with 0.75 MIPS
• Internal architecture 16 bits
• External bus Width 8 bits data, 20 bits address
• Number of Transistors 29,000 at 3 µm
• Addressable memory 1 megabyte
• Identical to 8086 except for its 8 bit external bus (hence an 8 instead of
a 6 at the end)
• Used in IBM PCs and PC clones
9
16-bit processors………
80186
Introduced 1982
Clock rates : 6 MHz with > 1 MIPS
Number of Transistors 29,000 at 2 µm
Included two timers, a DMA controller, and an interrupt controller on
the chip in addition to the processor (These were at fixed addresses which
differed from the IBM PC, making it impossible to build a 100% PC-
compatible computer around the 80186.)
Added a few opcodes and exceptions to the 8086 design; otherwise
identical instruction set to 8086 and 8088.
Used mostly in embedded applications – controllers, point-of-sale
systems, terminals, and the like
Used in several non-PC-Compatible MS-DOS computers.
10
16-bit processors………
80286:
Introduced February 1982
• Clock rates:
6 MHz with 0.9 MIPS
8 MHz, 10 MHz with 1.5 MIPS
12.5 MHz with 2.66 MIPS
16 MHz, 20 MHz and 25 MHz available
• Bus Width: 16 bit data, 24 bit address.
• Included memory protection hardware to support multitasking
operating systems with per-process address space
• Number of Transistors 134,000 at 1.5 µm
• Addressable memory 16 MB (16 MB)
• Added protected-mode features to 8086 with essentially the
same instruction set
• 3-6X the performance of the 8086
• Widely used in IBM-PC AT and AT clones contemporary to it
11
32-bit processors
80386 Range:
• Introduced October 17, 1985
• Clock rates:
– 16 MHz with 5 to 6 MIPS
– 20 MHz with 6 to 7 MIPS, introduced in 1987
– 25 MHz with 8.5 MIPS, introduced in 1988
– 33 MHz with 11.4 MIPS introduced April 10,
1989
• Bus Width 32 bit data, 32 bit address
• Number of Transistors 275,000 at 1 µm
• Addressable memory 4 GB
• Virtual memory 64 TB
• Used in Desktop computing
12
80486 range
• Introduced April 10, 1989
• Clock rates:
– 25 MHz with 20 MIPS
– 33 MHz with 27 MIPS introduced May 7, 1990
– 50 MHz with 41 MIPS introduced June 24, 1991
• Bus Width 32 bits
• Number of Transistors 1.2 million at 1 µm; the 50 MHz was at 0.8 µm
• Addressable memory 4 GB
• Virtual memory 1 TB
• Level 1 cache of 8 KB on chip
• Math coprocessor on chip
• Used in Desktop computing and servers
13
Pentium
14
Microprocessor Performance: MIPS and iCOMP
•iCOMP- Intel
Comparative
Microprocessor
Performance index ratings
15
Reprogrammable microprocessors
General purpose microcomputers
•8086/8088,
•80286,
• 80386,
• 80486,
• Pentium processor,
Embedded microprocessors
Special purpose microcomputers
•8080
•8048/ 8051,
•80186 / 80188,
• 80C186xl,
• 80386Ex,
16
17
Chapter 2
8086/8088 Microprocessor
Architecture
18
8086 Microprocessor Architecture
AH AL AX
Data Segment
BH BL BX (64 Kbytes)
CH CL CX
DH DL DX
Stack Segment
SP(16-bit) (64 Kbytes)
BP(16-bit)
SI(16-bit)
Extra Segment FFFF16
DI(16-bit) (64 Kbytes)
SR (16-bit) FFFFF16
20
Memory address space and Data organization
Memory
address space
•8086 MP supports 1MB(1,048,576 bytes) of External Memory of 8086
21
Storing a word of data in
memory
Aligned and misaligned data words
EX: EX:
Memory Memory
Address Address
00003 00 00003 00
00002 00 00002 12
00001 12 00001 34
00000 34 00000 00
Data word 1234h is stored @ address Data word 1234h is stored @ address
00000h 00001h
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Data Types
Integer data Type:
• Unsigned integer:
Unsigned word integer: 0 to 65,535 (0 to 216 -1)
Unsigned byte integer: 0 to 255 (0 to 28 -1)
• Signed integer:
Signed word integer: 32,767 to -32,768 (215 -1 to - 215 )
Signed byte integer: 127 to -128 (27-1 to -27)
BCD numbers:
• Unpacked BCD ex. 0000 0101BCD 05
0000016
Code Segment
(64 Kbytes)
CS (16-bit)
Data Segment
DS (16-bit) (64 Kbytes)
SS (16-bit)
ES (16-bit)
Stack Segment
(64 Kbytes)
Extra Segment
(64 Kbytes) 24
FFFFF16
Dedicated Reserved and General use memory
RESERVED
For Future FFFFFH
products FFFFCH
FFFFBH
FFFF0H
FFFEFH
DEDICATED Open
RESERVED
for Hardware reset
jump instruction To store
pointer for
80H
user defined
7FH
interrupts
14H
13H
DEDICATED 0H
25
Instruction pointer. (IP)
• IP is also 16-bit in length and identifies the location of the next word of
instruction code to be fetched from current code segment of memory
• It is similar to program counter
• It contains the offset of the next word of instruction code instead of
address.
• The offset in IP is combined with the current value in CS to generate
the 20-bit address.
• This is because IP and CS are 16-bit in length, but 20-bit address is
needed to access memory.
• Therefore the value of the address for the next code access is often
denoted as CS:IP.
26
Data registers
• AX – Accumulator
• BX – Base register
• CX – Count register
• DX – Data register
• SP – Stack pointer
• BP – Base pointer
• SI – Source index
• DI – Destination index
27
Status register
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
- - - - OF DF IF TF SF ZF - AF - PF - CF
Status flags
•CF – Carry flag: Is Set when there is carry out or barrow in from most
significant bit of the result during the execution of instruction, other wise CF is reset.
•PF – Parity flag: Is Set when result produced by the execution of the instruction
has even parity, other wise PF is reset.
•AF – Auxiliary carry: AF is set when there is carry out or barrow in from lower
nibble to higher nibble, during the execution of instruction, other wise AF is reset.
• ZF – Zero flag: ZF is set if result produced by the execution of instruction is zero,
other wise ZF is reset.
•SF – Sign flag: MSB of the result is copied into SF.
•OF – Over flow flag: when OF is set it indicates signed result is out of
range. If the result is not out of range, OF remains reset.
28
Control Flags:
• TF – Trap flag: TF is set 8086 goes into the single step mode of operation.
• IF – Interrupt flag :IF is set it recognize the maskable interrupt at its
interrupt input pin (INT). When IF is reset requests at INT are ignored and
maskable interrupt is disabled.
• DF – Direction flag : Logic level of DF determines the direction in which
string operations will occur.
When it is set the string automatically decrements the address. Therefore
string the string data transfers proceed from high address to low address.
When it is reset the string automatically increments the address. Therefore
string the string data transfers proceed from low address to high address.
29
Generating a Memory address
15 0
Offset Value Offset
15 0
Segment register 0000 Segment
address
Adder
20 0
20 – bit Physical memory address
30
The Stack
• Stack is a block of memory.
• It is used for temporary storage of information such as
data and address.
31
Input /Output address space
FFFFH
100H
FFH Reserved
F8H
F7H
Open
00H
32
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