TECHNO MAIN SALT LAKE

DEPARTMENT OF COMPUTER SCIENCE ENGINEERING

COMPUTER ARCHITECTURE(PCC-CS402)

OWNERSHIP BASED CACHE COHERENCE

NAME OF FACULTY: ASSIT. PROF. NAIRANJANA CHOWDHURY
STUDENT NAME (ROLL NO): ARUNAVA BISWAS (13000120141)
STUDENT NAME (ROLL NO): SUTANU GHOSAL (13000120143)

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 CONTENT

• INTRODUCTION TO CACHE COHERENCE

• PROBLEMS WHEN USING CACHE FOR MULTIPROCESSOR SYSTEM
• MSI PROTOCOL
• MESI PROTOCOL
• MOSI PROTOCOL
• MOESI PROTOCOL
• BIBLIOGRAPHY

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 INTRODUCTION TO CACHE COHERENCE

A COMPUTER SYSTEM WHICH HAS TWO OR MORE PROCESSORS WORKING SIMULTANEOUSLY AND SHARING
THE SAME HARD DISK, MEMORY AND OTHER MEMORY DEVICES.

CACHE COHERENCE IS CONCERN IN A MULTICORE ENVIRONMENT BECAUSE OF DISTRIBUTED L1 AND L2

CACHES. SINCE EACH CORE HAS ITS OWN CACHE, THE COPY OF THE DATA IN THAT CACHE MAY NOT ALWAYS
BE THE MOST UP-TO-DATE VERSION. FOR EXAMPLE, IMAGINE A DUAL-CORE PROCESSOR WHERE EACH CORE
BROUGHT A BLOCK OF MEMORY INTO ITS PRIVATE CACHE, AND THEN ONE CORE WRITES A VALUE TO A
SPECIFIC LOCATION. WHEN THE SECOND CORE ATTEMPTS TO READ THAT VALUE FROM ITS CACHE, IT WILL
NOT HAVE THE MOST RECENT VERSION UNLESS ITS CACHE ENTRY IS INVALIDATED AND A CACHE MISS
OCCURS. THIS CACHE MISS FORCES THE SECOND CORE’S CACHE ENTRY TO BE UPDATED. IF THIS COHERENCE
POLICY WAS NOT IN PLACE, THE WRONG DATA WOULD BE READ AND INVALID RESULTS WOULD BE
PRODUCED, POSSIBLY CRASHING THE PROGRAM OR THE ENTIRE COMPUTER.

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 PROBLEMS WHEN USING CACHE FOR
MULTIPROCESSOR SYSTEM
• SINCE ALL THE PROCESSORS SHARE THE SAME
ADDRESS SPACE, IT IS POSSIBLE FOR MORE THAN
ONE PROCESSOR TO CACHE AN ADDRESS AT THE
SAME TIME.(COHERENCE ISSUE)
• IF ONE PROCESSOR UPDATES THE DATA ITEM
WITHOUT INFORMING THE OTHER PROCESSOR,
INCONSISTENCY MAY RESULT AND CAUSE
INCORRECT EXECUTION.(CONSISTENCY ISSUE)

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 MSI PROTOCOL

THIS IS A BASIC CACHE COHERENCE PROTOCOL USED IN MULTIPROCESSOR

SYSTEM. THE LETTERS OF PROTOCOL NAME IDENTIFY POSSIBLE STATES IN
WHICH A CACHE CAN BE. SO, FOR MSI EACH BLOCK CAN HAVE ONE OF THE
FOLLOWING POSSIBLE STATES:

• MODIFIED (M) -
THE BLOCK HAS BEEN MODIFIED N CACHE, I.E., THE DATA IN THE CACHE IS
INCONSISTENT WITH THE BACKING STORE (MEMORY). SO, A CACHE WITH A
BLOCK IN “M” STATE HAS RESPONSIBILITY TO WRITE THE BLOCK TO BACKING
STORE WHEN IT IS EVICTED.

• SHARED (S) -
THIS BLOCK IS NOT MODIFIED AND IS PRESENT IN ATLEAST ONE CACHE. THE
CACHE CAN EVICT THE DATA WITHOUT WRITING IT TO BACKING STORE.

• INVALID (I) -
THIS BLOCK IS INVALID AND MUST BE FETCHED FROM MEMORY OR FROM
ANOTHER CACHE IF IT IS TO BE STORED IN THIS CACHE.

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 MESI PROTOCOL
IT IS THE MOST WIDELY USED CACHE COHERENCE PROTOCOL. EVERY CACHE
LINE IS MARKED WITH ONE THE FOLLOWING STATES:

• MODIFIED –
THIS INDICATES THAT THE CACHE LINE IS PRESENT IN CURRENT CACHE
ONLY AND IS DIRTY I.E. ITS VALUE IS DIFFERENT FROM THE MAIN
MEMORY. THE CACHE IS REQUIRED TO WRITE THE DATA BACK TO MAIN
MEMORY IN FUTURE, BEFORE PERMITTING ANY OTHER READ OF INVALID
MAIN MEMORY STATE.

• EXCLUSIVE –
THIS INDICATES THAT THE CACHE LINE IS PRESENT IN CURRENT CACHE
ONLY AND IS CLEAN I.E. ITS VALUE MATCHES THE MAIN MEMORY VALUE.

• SHARED –
IT INDICATES THAT THIS CACHE LINE MAY BE STORED IN OTHER CACHES
OF THE MACHINE.

• INVALID –
IT INDICATES THAT THIS CACHE LINE IS INVALID.

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 MOSI PROTOCOL
THIS PROTOCOL IS AN EXTENSION OF MSI PROTOCOL. IT ADDS THE FOLLOWING STATE
IN MSI PROTOCOL:
• MODIFIED (M) - ONLY ONE CACHE HAS A VALID COPY OF THE BLOCK AND THE
VALUE IS LIKELY TO BE DIFFERENT FROM THE ONE IN MAIN MEMORY. IT HAS
ALMOST THE SAME MEANING AS A DIRTY STATE IN A WRITE BACK CACHE EXCEPT
FOR THE DIFFERENCE THAT MODIFIED STATE ALSO IMPLIES EXCLUSIVE OWNERSHIP
OF THAT BLOCK. DIRTY STATE JUST MEANS THAT THE VALUE OF THE BLOCK IS
DIFFERENT FROM THE ONE IN MAIN MEMORY, WHEREAS, MODIFIED IMPLIES THAT
THE VALUE IS DIFFERENT THAN THAT OF THE MAIN MEMORY AND THAT IT IS
CACHED IN ONLY ONE LOCATION.
• OWNED (O) - MULTIPLE CACHES MAY HOLD THE MOST RECENT AND CORRECT
VALUE OF A BLOCK AND THE VALUE IN MAIN MEMORY MAY OR MAY NOT BE
CORRECT. AT A TIME, ONLY ONE CACHE CAN HAVE THE OWNED STATE FOR A BLOCK.
ALL THE OTHER CACHES WITH THE SAME BLOCK MUST BE IN SHARED STATE.
• SHARED (S) - CACHE BLOCK IS VALID, COULD BE SHARED BY MULTIPLE CACHES,
AND MAY OR MAY NOT HAVE THE SAME VALUE AS THE MAIN MEMORY. OTHER
PROCESSORS CAN READ FROM THIS, BUT DO NOT HAVE WRITE PERMISSIONS.
• INVALID (I) - CACHE BLOCK IS INVALID.

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 MOESI PROTOCOL
THIS IS A FULL CACHE COHERENCE PROTOCOL THAT ENCOMPASSES ALL OF THE POSSIBLE STATES COMMONLY
USED IN OTHER PROTOCOLS. EACH CACHE LINE IS IN ONE OF THE FOLLOWING STATES:

• MODIFIED –
A CACHE LINE IN THIS STATE HOLDS THE MOST RECENT, CORRECT COPY OF THE DATA WHILE THE COPY IN THE
MAIN MEMORY IS INCORRECT AND NO OTHER PROCESSOR HOLDS A COPY.

• OWNED –
A CACHE LINE IN THIS STATE HOLDS THE MOST RECENT, CORRECT COPY OF THE DATA. IT IS SIMILAR TO
SHARED STATE IN THAT OTHER PROCESSORS CAN HOLD A COPY OF MOST RECENT, CORRECT DATA AND UNLIKE
SHARED STATE HOWEVER, COPY IN MAIN MEMORY CAN BE INCORRECT. ONLY ONE PROCESSOR CAN HOLD THE
DATA IN OWNED STATE WHILE ALL OTHER PROCESSORS MUST HOLD THE DATA IN SHARED STATE.

• EXCLUSIVE –
A CACHE LINE IN THIS STATE HOLDS THE MOST RECENT, CORRECT COPY OF THE DATA. THE MAIN MEMORY
COPY IS ALSO MOST RECENT, CORRECT COPY OF DATA WHILE NO OTHER HOLDS A COPY OF DATA.

• SHARED –
A CACHE LINE IN THIS STATE HOLDS THE MOST RECENT, CORRECT COPY OF THE DATA. OTHER PROCESSORS IN
SYSTEM MAY HOLD COPIES OF DATA IN SHARED STATE AS WELL. THE MAIN MEMORY COPY IS ALSO THE MOST
RECENT, CORRECT COPY OF THE DATA, IF NO OTHER PROCESSOR HOLDS IT IN OWNED STATE.

• INVALID –
A CACHE LINE IN THIS STATE DOES NOT HOLD A VALID COPY OF DATA. VALID COPIES OF DATA CAN BE EITHER
IN MAIN MEMORY OR ANOTHER PROCESSOR CACHE.

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 BIBLIOGRAPHY
I HAVE TAKEN HELP TO COMPLETE THIS PRESENTATION TO MAKE IT SUCCESFULL BY THE FOLLOWING
WEBSITES –

 HTTP://WWW.GEEKSFORGEEKS.ORG

 EN.WIKIPEDIA.ORG

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 Thank you

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