Computer Architecture and

Organization

Chapter Three
Lecture 1
Memory System
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 Memory Unit
 In this chapter:

Memory Hierarchy
Cache Memory
Main Memory
External Memory

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Memory Unit

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 Memory
 Memory is an essential component of computers
It is used for storing programs and data
 It exhibits wide range of
Type
 Technology
Organization
 Performance, and cost

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Characteristics of Memory Systems
 Location
 Capacity
 Unit of transfer
 Access method
 Performance
 Physical type
 Physical characteristics
 Organization

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 Characteristics :- Location
 Location:
Refers to whether it is internal or external to computers
CPU:
Registers
Internal:
main memory, cache
Directly accessible by CPU
External: – magnetic disks, tapes, optical disks
Accessible by CPU thru I/O module

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 Characteristics :- Capacity
 Capacity:
For internal memory, typically expressed in bytes (8 bits)
or words (8, 16, 32 bits)
External, in terms of bytes
 Unit of transfer:
 Equal to the number of electrical lines into and out of the
memory module.
 For main memory, this is the number of bits read out of or
written into memory at a time.
 Internal: the no of data lines into and out of memory
 May be equal to word length or larger (64, 128, or 256 bits)
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 Characteristics :- Related
Related concepts
Word: the “natural” unit of organization of memory
Usually equal to size of integer or instruction length
Addressable units: Smallest location which can be
uniquely addressed
Usually a word
Some systems allow memory addressing at byte level
For a length of A address bits, no of addressable units
N is 2A = N
For external memory, transfer is in blocks
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 Characteristics :- Method of Access
 Method of access:
A) Sequential access:
Access to records is made in a specific linear sequence
Shared read/write mechanism
Access time :– depends on location of data and current
location of read/write mechanism
e.g. tape
B) Direct access:
Individual blocks have unique address
Shared read/write mechanism
Access by jumping to vicinity plus sequential search
Access time :– depends on location and current location of
read/write mechanism
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e.g. disk
 Characteristics …
C) Random access:
Each addressable location in memory has a unique, physically
wired-in addressing mechanism.
Each location :– its own (wired) addressing mechanism
Access time :– constant, independent of location or previous
access
e.g. RAM
D) Associative
Data is located based on a portion of its content rather than its
address.
Comparison done simultaneously on all words
Access time: – independent of location or previous access
e.g. cache
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 Characteristics :- Performance
 Access time (latency)
 For random-access memory:- it is the time from the instant
that an address presented to the memory to the time that the
data have been stored or made available for use.
 For non-random-access memory: - it is the time it takes to
position the read-write mechanism at the desired location.
 Memory cycle time
 Access time plus any additional time required before a
second access can commence.
 Represents (access time + recovery time)
 Note: memory cycle time is concerned with the system
bus, not the processor. 11
 Characteristics :- Performance
 Transfer rate
Rate at which data can be moved into/out of a memory unit
For random-access memory:
Transfer rate= 1 / cycle time
For non-random-access memory:

TN = TA + N/R
TN = average time to read/write N bits
TA = average access time
N = number of bits
R = transfer rate [bps]
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Characteristics :- Physical Characteristics
 Physical Types
Semiconductor: RAM
Magnetic surface: Disk & Tape
Optical and magneto optical: CD & DVD
 Issues
Volatile/Non-volatile
Erasable/Non-erasable

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 Memory Hierarchy
 Design constraints :– The 3 questions:
 How much memory?
Never enough
Larger memory capacity → more complex
applications will be developed to use it
 How fast?
Need to keep up with CPU
 How expensive?
Reasonable with respect to the other components
 Can’t have them all!

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 Memory Hierarchy

 Trade-off among the three characteristics:

The following relationships hold:
Faster access time, greater costs per bit
Greater capacity, smaller costs per bit
Greater capacity, slower access time

Solution:
Memory hierarchy
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Memory Hierarchy

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 Memory Hierarchy

 Registers
 L1 Cache
 L2 Cache
 Main memory
 Disk cache
 Disk
 Optical
 Tape Access Cost per Capacity Frequency of
time bit access by
CPU
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 Memory Hierarchy

 The effectiveness of memory hierarchy depends on the

principle of moving information into the fast memory
infrequently and accessing it many times before replacing
it with new information.
 This principle is possible due to a phenomenon called
locality of reference

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 Locality of Reference

 Locality of Reference:- with a given period of time, programs tend

to reference a relatively clusters of memory repeatedly.
There exists two forms of locality:
 Spatial locality
 Temporal locality
 Spatial Locality (locality in space): refers to the phenomenon that
when a given address has been referenced, it is most likely that
addresses near it will be referenced with in a short period of time.
 Temporal Locality (locality in time): refers to the phenomenon that
once a particular memory item has been referenced, it is most likely
that it will be referenced next.
 Example: an instruction in a program loop
 Over long term :– clusters change
 Over short term: – CPU works within clusters 19
 Cache
 Cache is at the first level of memory hierarchy and used to keep
the information expected to be used more frequently by the CPU.
 Small amount of fast memory between main memory and CPU
 May be located on CPU chip or module
 Contains a copy of portion of main memory

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 Cache Memory Principle

 At any given time some active portion of the main

memory is duplicated in the cache.
 Therefore when the processor makes a request for a
memory reference, the request is first sought in the cache.
 If the request corresponds to an element that is currently
residing in the cache, get from cache (fast)==cache hit.
 On the other hand, if the request corresponds to an
element that is not currently in the cache, read required
block from main memory to cache== cache miss.
 Cache includes tags to identify which block of main
memory is in each cache slot

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Cache/Main Memory Structure

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 Cache/Main Memory Structure
 Main memory consists up to 2n addressable words, with each word
having a unique n-bit address.
 For mapping purposes, let us assume this memory consists of a number
of fixed length blocks of k words each.
M=2n/k (number of blocks in main memory)
 The cache consists of m blocks, called lines. Each line contains k-word
plus a tag of a few bits and other control bits.
 Note:
 The length of a line, not including tag and control bits, is the
line size
 Tags: – identify which block of main memory is in each cache line
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Cache Operation

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Typical Cache Organization

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 Next:
Elements of cache design

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