Combinational Circuits

ENEL 111
Common Combinationals Circuits

 NAND gates and Duality

 Adders
 Multiplexers
De Morgan again
A NAND gate:
Y = A.B = A + B

is the same as an OR gate with two NOT gates

Similarly a NOR gate is the same as an AND gate

with two inverters
Y = A + B = A.B
not the individual terms
change the sign

not the lot

Dual gates

not the individual inputs

change the gate
not the output
Truth Tables and Boolean Notation
 NAND Gate
NOT
Representation
X X
 It is possible to
implement any AND A.B
A
boolean expression B
A.B

using only NAND

gates OR
A

A  B  A.B A+B

B
Truth Tables and Boolean Notation
 NAND Gate representation
 Implement the following circuit using only NAND gates

x2

x4

x3

De Morgan can also be represented visually:

Solution
 Dual the gates, remember two nots together can
be removed.
A
A.B
A
A.B A+B
B

B
AND feeding OR

x2

x4

x3
Exercise
 Implement NOT, AND and OR using NOR gates

 Example AND gate dual circuit:

Solution
 Similar pattern to using NAND gates (not surprising)

X X
 NOT X X

A.B A
A
A.B
B
A.B
 AND
B

A+B A.B
A
A+B
B
B

 OR
Truth Tables and Boolean Notation
 NOR Gate representation
 It is also possible to implement any boolean
expression using only NOR gates
 Implement the following circuit using only NOR gates

X4
X3
X2
Solution
Two NOR gates in sequence acting as NOT’s can be eliminated:

X4
X3
X2
Examples
 The half adder
 The half adder is a circuit for adding two
single bit numbers
 Develop a truth table and Boolean A B S C
expressions for the half adder
0 0
0 1
1 0
1 1
S and C are the Sum and Carry
Half adder
 The sum is XOR operation and the carry an AND:

A B S C A C

0 0 0 0 B
S
0 1 1 0
1 0 1 0
1 1 0 1
Examples
 The full adder
 Develop a truth table and Boolean expressions for the
full adder, this circuit also includes a carry in.

Cin A B S C Sum
0 0 0 A
0 0 1 B full
0 1 0
0 1 1
adder Cout
1 0 0 Cin
1 0 1
1 1 0
1 1 1
Truth table for full adder

Exercise:
Cin A B S Cout
0 0 0 0 0 Complete the
0 0 1 1 0 Karnaugh maps for
0 1 0 1 0 the Sum and the
Carry out columns
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
K maps for sum and carry
Sum – 1 when odd number of inputs Carry out - simplifies to 3 pairs
is 1 = XOR gate

AB 00 01 11 10
AB 00 01 11 10 Cin
Cin 0 1
0 1 1 1 1 1 1
1 1 1
Sum = Cin xor A xor B Cout = A.B + A.Cin + B.Cin
Full adder circuit
A
B Sum

Cout

Cin

Sum = Cin xor A xor B Cout = A.B + A.Cin + B.Cin

 Examples
 The Multiplexer
 Selects one of 2n inputs and copies it to a single
output
 The selected line is determined from the bit
combination (address) on the n selection lines n=1
 e.g. 1 from 2 mutiplexer a 0 out
sel a b out b 1
0 0 0
0 0 1 sel
0 1 0
ab
00 01 11 10
0 1 1 sel
0
1 0 0
1
1 0 1
1 1 0 out =
1 1 1
2:1 Multiplexer
sel a b out
sel a b out 0 0 ? 0
0 0 0 0 0 1 ? 1
0 0 1 0 1 ? 0 0
0 1 0 1 1 ? 1 1
0 1 1 1 if a is selected, don’t
care about b.
1 0 0 0
1 0 1 1 AB
1 1 0 0 sel 00 01 11 10
1 1 1 1 0 1 1
1 1 1
K map for 2:1 Multiplexer

AB
sel 00 01 11 10 output = sel.a + sel.b
0 1 1
1 1 1 data

Principal can be extended to

4:1 – 2 select lines and 4 data lines out
8:1 – 3 select lines and 8 data lines
and so on…

sel
What you should be able to do:
Change circuits using one set of gates (eg AND, OR,
NOT) to their equivalent using NAND or NOR gates only
(and vice versa).

Be familiar with half-, full- adders and multiplexer circuits.

Be able to construct and interpret Karnaugh maps with up

to 4 input variables.

(if you need practice, come to the tutorial)