Advanced Microcontroller

and Embedded systems

Unit -1: PIC Architecture and Embedded C
Prerequisite:
 Knowledge of Number system
 Knowledge of basic logic components.
 Programming skills in C Language,
 Microprocessor and Microcontroller Architecture.
Objectives:

The objectives of this course are

 Help Students understand Architecture of PIC 18F458
microcontroller.
 Create and enhance ability to write and Interpret
Assembly and C language for PIC 18F458.
 Make students understand procedure to interface
peripherals with PIC 18F458 for various Applications.
Course outcomes:

On successful completion of the course the student will be able to

 CO1: Explain architecture of PIC 18F458 microcontroller, its
instructions and the addressing modes.
 CO2: Use Ports and timers for peripheral interfacing and
delay generation.
 CO3: Interface special and generate events using CCP module.
 CO4: Effectively use interrupt structure in internal and
External interrupt mode.
 CO5: Effectively use ADC for parameter measurement and also
understand LCD interfacing.
 CO6: Use Serial Communication and various serial
communication protocols.
 Introduction
 Microcontroller is an integrated circuit that is
programmed to do a specific task.
 Microcontroller are really just a mini computer
that are hidden in lots of appliances , other
electronic devises
Examples: Refrigerator

6
Examples: Car Door

7
Advance microcontroller - PIC

 Peripheral Interface Controller (PIC) was

originally designed by General Instruments and PIC was
sold to Microchip .
 Microchip (formed in 1989) developed their first 8-bit
Harvard architecture MCU
 Features: low-cost, self-contained, 8-bit, Harvard
structure, pipelined, RISC, single accumulator, with
fixed reset and interrupt vectors.
Von Neumann and Harvard
Computers

Harvard
Von Neumann

9
CISC and RISC
Sr.no CISC
.
1 Mc’s with Von Neumann
architecture are called CISC
microcontrollers
2 CISC instructions utilize more
cycle than RISC
3 Many instructions and modes
4 Not pipelined or less pipelined
5 Variable format instructions
6 Complexity in the micro program
7 Requires more memory to store
the instructions
8 Computers typically use CISC
RISC
Mc’s with Harvard architecture
are called RISC microcontrollers
All single cycle instruction
except branches
Few instructions and modes
Highly pipelined
Fixed format instructions
Complexity in the compiler
Requires less memory to store
the instructions
Tablets, smart phones use RISC
Question/Quiz 1
 What is full form of PIC18F458?
 Who manufacturing the PIC microcontroller?
 What type of architecture in PIC18F, Von
Neumann or Harvard ?
 In PIC which type of instruction set available CISC
or RISC?
 PIC18F458 is 8/16/32 bit microcontroller ?
Pipelining

 Pipelining is the process of accumulating and

executing computer instructions .The pipelining
related to cycle of execution of instruction.

 Instruction fetch is overlapped with execution of

previously fetched instruction
The clock input (from OSC1) is internally divided by four to generate
four non-overlapping quadrature clocks, namely Q1, Q2, Q3 and Q4.
Internally. An “Instruction Cycle” consists of four Q cycles (Q1,Q2, Q3
and Q4). The instruction fetch and execute are pipelined such that
fetch takes one instruction cycle while decode and execute takes
another instruction cycle.

However, due to the pipelining, each instruction effectively executes in

one cycle
Features of PIC 18F458
 8 bit microcontroller.
 Program memory (ROM):2M bytes (on chip 32K)
 Data memory (RAM) : 4K bytes(on chip 1536 GPRAM+256 SFR)
 SFR : 256 bytes
 I/O ports – port A to E with total 34 I/O pins
 16-bit wide instructions, 8-bit wide data path
 Three external interrupt pins INT0,INT1,INT2
 Timer0 module: 8-bit/16-bit timer/counter with 8-bit programmable
prescaler
 Timer1 module: 16-bit timer/counter
 Timer2 module: 8-bit timer with 8-bit period register (time-base for
PWM)
 Timer3 module: 16-bit timer/counter
 Capture/Compare/PWM (CCP) modules
 Enhanced CCP module
 10-bit,8channel Analog-to-Digital Converter module (A/D)
 Master Synchronous Serial Port (MSSP) with two modes of operation
I2C(inter integrated circuit)
SPI(Serial peripheral Interface)
 A Controller Area Network (CAN bus)-Message bit rates up to 1
Mbps 
 Wide operating voltage range (2.0V to 5.5V)
 Maximum clock frequency up to 40 MHz
 Program counter 21 bit
 Stack pointer 5bit
Question/Quiz 2
 What is the size of RAM address bus?
 What is the size of RAM data bus?
 How much is usable program memory ?
 How much is usable data (RAM) memory?
 How many levels of stack? Reason?
 How many timer available ? Name with sizes.
 SFR’s related to PORTS
 PORTx x=A to E
TRISCx : TRIState register to make given port as Input (put
1 in TRISx) or Output (put 0 in TRISx)
 Outputting data: the role of TRISx register is allowing
the data to go from PORTx to the Pins
 Inputting data: the role of TRISx register is allowing the
data to come into CPU from the Pins
LATx output LATch register
 The LATx register associated with an I/O pin eliminates
the problems that could occur with read-modify-write
instructions.
 A read of the LATx register returns the values held in
the port output latches, instead of the values on the I/O
pins.
 A write to the LATx register writes the data value to the
port latch same effect as a write to the PORTx register..
Pin diagram of PIC18F458
Question/Quiz 3

 What is dual function of PORT A?

 On which PORT pins hardware interrupt pins available?
 On which PORT pins serial communication pins
available?
 Where CCP module pin is available?
 How many analog channels and where it is ?
Data memory
 Each register in the data memory has a 12-bit address, allowing up
to 4K bytes of data memory (2^12=4096 , 1Kb=1024)
Data memory is often divided into two sections
 General Function Registers (GFR) or register file location 000-
0xF7F locations
 Special Function Registers (SFR) – specific to PIC 0xF80-0xFFF
(upper 128 bytes)
 Depending on the PIC chip, the sizes for GFR and SFR are
different.
 The Data memory map is divided into as many as 16 banks
that contain 256 bytes each. The lower 4 bits of the Bank
Select Register (BSR<3:0>) select which bank will be
accessed. The upper 4 bits for the BSR are not implemented.
 Thedata memory contains Special Function Registers (SFR)
and General Purpose Registers (GPR).
 The SFR’s are used for control and status of the controller
and peripheral functions, while GPR’s are used for data
storage and scratch pad operations in the user’s application.
 The entire data memory may be accessed directly, or
indirectly. Direct addressing may require the use of the BSR
register. Indirect addressing requires the use of the File Select
Register (FSR). Each FSR holds a 12-bit address value that
can be used to access any location in the Data Memory map
without banking.
 The Access Bank is comprised of the upper 160 bytes in
Bank 15 (SFR’s) and the lower 96 bytes in Bank 0.
 These two sections will be referred to as Access Bank
High and Access Bank Low, respectively. A bit in the
instruction word specifies if the operation is occur in the
bank specified by the BSR register, or in the Access Bank.
 When forced in the Access Bank (a = ’0’), the last address
in Access Bank Low is followed by the first address in
Access Bank High. Access
 MOVWF f,a Move WREG to file location, Move data from
WREG to register ’f’. Location ’f’ can be anywhere in the 256-
byte Bank. If ’a’ is 0, the Access Bank will be selected,
overriding the BSR value. If ’a’ is 1, the Bank will be selected
as per the BSR value.
Bank Select Register (BSR)
 The need for a large general purpose memory space dictates a
RAM banking scheme. The data memory is partitioned into
sixteen banks. When using direct addressing, the BSR should
be configured for the desired bank.
 BSR<3:0> holds the upper 4 bits of the 12-bit RAM address.
The BSR<7:4> bits will always read ’0’s, and writes will have
no effect.
 A MOVLB instruction has been provided in the instruction set
to assist in selecting banks.
 MOVLB Move literal to low nibble in BSR ,to select bank 2
MOVLB 0x02
 4 bit BSR gives 16 banks and each bank has 256 byte so
total it covers entire 256x16 = 4096 byte means 4 K of
data RAM. (1024 bytes= 1 Kbyte)
 Data RAM organized as bank 0 to 15, where lowest bank
0 has an address of 000 H to 0FF H and highest bank
address has F00 H to FFF H.
 In PIC 18 last bank no 15 is kept aside for SFR
 BSR hold the upper 4 bits of 12-bit RAM address of any
bank from bank 0 to bank 15, means
 Bank 0 address 000 H to 0FF H BSR value=0000
 Bank 1 address 100 H to 1FF H BSR value=0001
 Bank 2 address 200 H to 2FF H BSR value=0010
 Bank 5 address 500 H to 5FF H BSR value=0101
Working register (WREG)
Question/Quiz 4
 How many Banks in RAM ? What is size of each bank?
 What is significance of letter a, d in any instruction?
 For any arithmetic or logical operation one operand
must present in which register ?
 BSR hold the how many bits out of 12-bit RAM address
 Which instruction can be used for bank selection?
 Write instruction to select bank 10?
Program Memory
Organization
 The PIC18F458 device have a 21-bit program
counter that is capable of addressing the 2
Mbyte program memory space.
 The RESET vector address is at 0000h and the
interrupt vector addresses are at 0008h and
0018h. the diagram for program memory map
and stack for the PIC18F458.
 The PIC18F458 have 32 Kbytes of internal
Enhanced FLASH program memory.
 The FLASH Program Memory is readable, writable, and
erasable during normal operation over the entire VDD range.
 A read from program memory is executed on one byte at a
time. A write to program memory is executed on blocks of 8
bytes at a time. Program memory is erased in blocks of 64
bytes at a time.
 In order to read and write program memory, there are two
operations that allow the processor to move bytes between the
program memory space and the data RAM:
 Table Read (TBLRD)
 Table Write (TBLWT)
 The Table Pointer (TBLPTR) addresses a byte within the
program memory. The TBLPTR is comprised of three SFR
registers: Table Pointer Upper Byte, Table Pointer High Byte
and Table Pointer Low Byte
(TBLPTRU:TBLPTRH:TBLPTRL). These three registers join
to form a 22-bit wide pointer. The low order 21 bits allow the
device to address up to 2 Mbytes of program memory space.
The 22nd bit allows access to the Device ID.
 TBLPTR is used in reads, writes, and erases of the FLASH
program memory
 The stack operates as a 31-word by 21-bit stack memory
and a 5-bit stack pointer, with the stack pointer initialized
to 00000b after all RESETS. There is no RAM associated
with stack pointer 00000b. This is only a RESET value.

 During a CALL type instruction causing a push onto the

stack, the stack pointer is first incremented and the RAM
location pointed to by the stack pointer is written with
the contents of the PC.

 During a RETURN type instruction causing a pop from

the stack, the contents of the RAM location indicated by
the STKPTR is transferred to the PC and then the stack
pointer is decremented.
Question /Quiz 5

 What is size of program counter?

 What is size of program memory address bus?
 The -------- Program Memory is readable, writable, and
erasable.
 The PIC18F458 have ------ bytes of internal Enhanced
FLASH program memory.
 There is no RAM associated with stack pointer -------b.
STKPTR - STACK POINTER REGISTER
Stack Pointer (SP)
 Stack is a group of 31 word-size registers
used for temporary storage of memory
address during execution
 Requires 5-bit address n Saved in STKPTR
in SFR
 Used primarily for saving PC for next
program address prior to entering
subroutine
program counter (PC)
 The program counter (PC) specifies the address of
the instruction to fetch for execution. The PC is 21-
bits wide.
 21-bit PC can access up to 2MB

 22nd bit used to access configuration memory at

program time
program counter (PC)
 The low byte is called the PCL register. This register is
readable and writable.
 The high byte is called the PCH register. This register
contains the PC<15:8> bits and is not directly readable or
writable. Updates to the PCH register may be performed
through the PCLATH register.
 The upper byte is called PCU. This register contains the
PC<20:16> bits and is not directly readable or writable.
Updates to the PCU register may be performed through
the PCLATU register.
 The CALL, RCALL, GOTO and program branch instructions
write to the program counter directly.
Question /Quiz 6

 What is size of stack pointer?

 What is bit size of stack?
 -----bit PC can access up to ---- memory.
 What is function of stack pointer during PUSH and POP
instruction.
 Stack is ------- bit wide.
 Status register

C: Set when a carry occurs

Z: Set when the result is zero
N: Set when the result is negative, msb of 1
OV: Set when an overflow occurs
DC: Set when a digit carry occurs in the 4 lsb bits

Remember :
NOVember Zero DC Current.
Introduction to PIC18
Instruction Set
 Includes 77 instructions;
 73 instructions are 2 byte (16-bit) long….. (one word)
 Four instructions are 4 byte (32-bit) long ….(two-words)
 [ MOVFF fs,fd , LFSR fsr0,f , GOTO and CALL instructions.]

 Data transfer instructions

 Arithmetic instructions
 Logical instructions
Instruction cycle time
 The certain amount of time require for the CPU to execute
an instruction, in PIC this time is referred as Instruction
cycle. ( Machine cycle)
 The length of the Instruction cycle depends on the
frequency of oscillator connected to the PIC.
 In PIC one instruction cycle consist of 4 oscillator periods,
hence to calculate the instruction cycle for PIC is 4 times
oscillator period. Means in terms of frequency (1/4) of
oscillator frequency.
 Example: find the period of Instruction cycle for 4 MHz
oscillatory frequency.
PIC oscillatory frq. = (1/4) connected oscillator feq. = (1/4)x4
= 1MHz
Instruction cycle= 1/ 1 MHz = 0.1 microseconds.
Instruction cycle time
 Default oscillatory frq. is 10 MHz in all questions related
to PIC18
 Instruction cycle time : 0.4 microseconds.
 Suppose Instruction MOVLW k
 It is 2 byte instruction and requires 1 cycle.
Hence instruction cycle time for this instruction is 0.4
microseconds if oscillatory frequency (XTAL) is 10MHz.

Now tell What is instruction cycle time for MOVFF fs , fd.?

Question /Quiz 7
 When negative flag set or reset ?
 When zero flag set or reset ?
 What are the conditional branch related to flag bits?
 Give the value of status register after addition of 9F and
52.
 Give the status of all flag bits after addition of 1F and
01.
 How many instruction are of 4bytes?
 --- bit= 1byte and 1024 byte = --- Kbyte
 Enlist 4byte instructions.
An Embedded System can be best described as a system
which has both the hardware and software and is designed
to do a specific task. A good example for an Embedded
System, which many households have, is a Washing
Machine.

Some of the embedded systems in a Car are Anti-lock

Braking System (ABS), Temperature Monitoring System,
Automatic Climate Control, Tyre Pressure Monitoring
System, Engine Oil Level Monitor, etc. 
The Embedded C Programming Language uses the same
syntax and semantics of the C Programming Language like
main function, declaration of datatypes, defining variables,
loops, functions, statements, etc.

A simple C program that prints “I wrote a C-program” is

 /* First C-program */
# include <stdio.h>
main ( )
{
printf (“I wrote C-program”) ;
}
 The data types in C language include char, int, float, and
double.
 A variable declared as a char (character) usually holds eight
bits of data. A variable of int (integer) type, on the other hand,
can hold 16 or 32 bits of data. The type float specifies a 32-bit
single precision floating point number.
 The type double can be used to declare a data as a 64-bit
double precision floating point number.
 The qualifiers unsigned and signed can be used with char and
int data types. The unsigned char is always positive, and covers
a range of values from 0 to 255.
 The signed char covers a range of values from -128 to +127 (0
being positive). The C compilers use signed char as default.
 The unsigned integer covers a range of values from 0 to 65535
while the signed integer covers a range of values from - 32,768 to +
32767 ( 0 being positive). The signed int or simply int (default for
C compilers) can be used to specify values from -32,768 to +32,767
(0 being positive).

 Examples of declaring char and int data types are provided below:
unsigned char i; /* specifies i as an unsigned 8-bit number*/
char x; /*declares x as a signed 8-bit number
unsigned int b; /*declares b as an unsigned 16-bit integer*/
int a; /* defines variable as a 16-bit signed integer*/
 Control loops

 Programming languages provide various control structures that

allow for more complicated execution paths.
 A loop statement allows us to execute a statement or group of
statements multiple times.
 Three loops are used for, while and do while loop
 The Infinite Loop
 A loop becomes an infinite loop if a condition never becomes
false. The for loop is traditionally used for this purpose. When
the conditional expression is absent, it is assumed to be true.
 for( ; ; ) infinite loop
 while(1) infinite loop
 while(a==0); till a=0,stay here or wait till a=1.
 for(i=0 ; i<5 ; i++) ; till condition true stay here
Functions
 A function is a group of statements that together perform
a task. Every C program has at least one function, which
is main()
 A function declaration tells the compiler about a
function's name, return type, and parameters. A
function definition provides the actual body of the
function.
return_type function_name( parameter list )
{ body of the function }

 Example: function delcarations

void Msdelay (void);
void T0delay (unsigned char );
Function declaration
 void msdelay (unsigned int ms);
example, the C statement
PORTC = PORTC ^ 0xFF; will toggle all bits of PORTC.

PORTCbits.RC0 = ~ PORTCbits.RC0 , Toggle RC0

TRISCbits.TRISC1=1 ; Set input direction to RC1

TRISBbits.TRISB1=1 ; Set input direction to RB1

Data Structures in C 
 Data Structures in C are used to store data in an
organized and efficient manner. The C Programming
language has many data structures like an array, stack.
 A programmer selects an appropriate data structure and
uses it according to their convenience.
 a data structure is a data organization, management,
and storage format that enables efficient access and
modification. More precisely, a data structure is a
collection of data values, the relationships among them,
and the functions or operations that can be applied to
the data.
 Arrays allow to define type of variables that can hold
several data items of the same kind.
Similarly structure is another user defined data type
available in C that allows to combine data items of
different kinds.
include <stdio.h>
#include <string.h>
struct Books
{
char title[50];
char author[50];
char subject[100];
int book_id;
};
int main( )
{
struct Books Book1; /* Declare Book1 of type Book */
/* book 1 specification */
strcpy( Book1.title, "C Programming");
strcpy( Book1.author, “Yashwant kanetkar");
strcpy( Book1.subject, "C Programming Tutorial");
Book1.book_id = 6495407;
/* print Book1 info */
printf( "Book 1 title : %s\n", Book1.title);
printf( "Book 1 author : %s\n", Book1.author);
printf( "Book 1 subject : %s\n", Book1.subject);
printf( "Book 1 book_id : %d\n", Book1.book_id);
return 0;
}
Source files and header files

 c source file contains all of the code and the

header file contains the function prototypes, that is, just a
declaration of which functions can be found in the source
file.
 A common convention in C programs is to write a
header file (with .h suffix) for each source file
(.c suffix) that link to main source code.
Pre-processor directives
 #include <filename.h>
Example : #include<p18f458.h>
 #define name replacement
Example: #define mybit PORTBbits.RB0
 #pragma : The MPLAB C18 compiler uses sections to manage the memory. A
section is a portion of an application located at a specific address of memory.
Sections can contain code or data. A section can be located in either program
or data memory. There are two types of sections for each type of memory:
Data memory
 udata-contains statically allocated uninitialized user variables
 idata-contains statically allocated initialized user variables
#pragma idata a=0x150
unsignd int a=5;
#pragma udata c=0x160
unsigned int c;