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Neuro Morphic
Neuro Morphic
Neuro Morphic
VLSI 2016: Four-Layer 3D Vertical RRAM Integrated with FinFET as a Versatile Computing
Unit for Brain-Inspired Cognitive Information Processing – HS Philip Wong (H. Li et al.,
Stanford University)
For the first time, a four-layer HfOx-based 3D vertical RRAM, the “tallest” one ever reported, is developed and integrated
with FinFET selector.
Uniform memory performance across four layers is obtained (±0.8V switching, 10 6 endurance, 104s@125°C).
SPICE simulations show that high drive current of pillar select transistors is required for high-rise 3D RRAM arrays.
The four-layer 3D RRAM is a versatile computing unit for (a) brain-inspired computing and (b) in-memory computing.
The 3D architecture with dense and balanced neuron-synapse connections provides 55% EDP savings and 74% VDD
reduction (enhanced robustness) compared with conventional 2D architecture.
mmhlabs.org 11/03/2021 2
Sci. Adv. 2016: Organic core-sheath nanowire artificial synapses with femtojoule energy
consumption (W. Xu et al., Pohang University of Science and Technology)
Demonstration of organic nanowire (ONW)
synaptic transistors (STs) that emulate the
important working principles of a biological
synapse.
mmhlabs.org 11/03/2021 3
VLSI 2016: Novel RRAM-enabled 1T1R synapse capable of low-power STDP via burst-mode
communication and real-time unsupervised machine learning (S. Ambrogio et al.,
Politecnico di Milano University)
Demonstration of a new synapse based on one-transistor/one-resistor
(1T1R) structure performing spike-timing dependent plasticity (STDP)
with lower area than 2T1R.
STDP functionality and robust learning are shown by both deterministic
and stochastic synapses.
Demonstration of 105 reduction of power consumption thanks to burst
operation and 86% efficiency of MNIST handwritten-digit classification.
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Nature Comm 2016: Neuromorphic device architectures with global connectivity through
electrolyte gating (P. Gkoupidenis et al., Ecole Nationale Superieure des Mines)
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Nature Elect 2016: Learning through ferroelectric domain dynamics in solid-state synapses(S.
Boyn et al., Universite Paris-Saclay)
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Nature Mat 2017: Memristors with diffusive dynamics as synaptic emulators for neuromorphic
computing (Z. Wang et al., University of Massachusetts)
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Nature Mat 2017: A non-volatile organic electrochemical device as a low-voltage artificial
synapse for neuromorphic computing (Y.V.D Burgt et al., Stanford University)
Demonstration of demonstrate a new organic electronic device made with inexpensive and commercially
available plastic materials that behaves as an artificial synapse.
Artificial synapse exhibits a large number of non-volatile and reproducible states (>500) and operates at very
low voltages.
Artificial synapse switches with low energy density and we project that just ∼35 aJ is sufficient to switch a sub-
micron device, a number smaller than that of biological synapses
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Nature Comm. 2017: Face classification using electronic synapses – HS Philip Wong (P. Yao et
al., Tsinghua University)
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VLSI 2017: Novel ferroelectric FET based synapse for neuromorphic systems (H.
Mulaosmanovic et al., NaMLab gGmbH)
First demonstration of a synapse based on a single ferroelectric FET (FeFET) integrated in a 28nm HKMG technology,
having hafnium oxide as the ferroelectric and a resistive element in series.
The gradual and non-volatile ferroelectric switching is exploited to mimic the synaptic weight.
Both the spike-timing dependent plasticity (STDP) and the signal transmission are demonstrated and the effect of the
spike properties and circuit design on STDP is discussed .
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Nature 2017: Neuromorphic computing with nanoscale spintronic oscillators (J. Torrejon et al.,
Université Paris-Saclay)
Experimental demonstration that a nanoscale spintronic oscillator (a magnetic tunnel junction) can be used to
achieve spoken-digit recognition with an accuracy similar to that of state-of-the-art neural networks.
Determination of the regime of magnetization dynamics that leads to the greatest performance.
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Sci. Adv. 2017: On-chip photonic synapse (Z. Cheng et al., University of Oxford)
Demonstration of a hardware synapse, implemented entirely in the optical domain via a photonic integrated-circuit
approach.
Using purely optical means brings the benefits of ultrafast operation speed, virtually unlimited bandwidth, and no
electrical interconnect power losses.
The synapse uses phase-change materials combined with integrated silicon nitride waveguides.
Crucially, the synaptic weight can be randomly set simply by varying the number of optical pulses sent down the
waveguide
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Nature Comm 2017: Flexible three-dimensional artificial synapse networks with correlated
learning and trainable memory capability (C. Wu et al., Hanyang University)
a b c
Demonstration of flexible three-dimensional
artificial chemical synapse networks, in
which two-terminal memristive devices,
namely, electronic synapses (e-synapses),
are connected by vertically stacking
crossbar electrodes.
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Sci. Adv. 2017: Memristive stochastic plasticity enables mimicking of neural synchrony:
Memristive circuit emulates an optical illusion (M. Ignatov et al., Christian-Albrechts-Universität
zu Kiel)
Demonstration that memristive devices
allow a new degree of freedom for this
concept: a local memory that supports
transient connectivity patterns in oscillator
networks.
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IEDM 2017: 2D Molybdenum Disulfide (MoS2) Transistors Driving RRAMs with 1T1R Configuration
– HS Philip Wong (R. Yang et al., Stanford University)
mmhlabs.org 11/03/2021 15
IEDM 2017: Investigation of Statistical Retention of Filamentary Analog RRAM for
Neuromophic Computing (M. Zhao et al., Tsinghua University)
Analog retention behavior of filamentary RRAM array is investigated for the first time
The conductance distributions of all the conductance levels follow normal distribution with the standard
deviations increasing linearly with the square root of time
Physical mechanism for analog retention is elucidated based on defect theory and Brownian Motion;
A compact model is proposed to predict the retention behavior of analog filamentary RRAM and to evaluate the
performance of neuromorphic system.
mmhlabs.org 11/03/2021 16
IEDM 2017: Modeling Disorder Effect of the Oxygen Vacancy Distribution in
Filamentary Analog RRAM for Neuromorphic Computing (B. Gao et al., Tsinghua University)
Analog RRAM has been recently developed where multiple weak conductive filaments (CF) are created instead of an
abrupt one. This device can switch in nanoseconds with excellent retention and edurance. However, device physics
were still not understood well.
In this work, the authors perform Kinetic Monte Carlo simulations to show that oxygen vacancies distribution dictates the
analog behavior, current noise and temperature coefficient.
Authors propose an order parameter “Ov” to quantify the analog behavior
Ov parameter should be around 0.25 to transition the abrupt CF into the analog switching mechanism
mmhlabs.org 11/03/2021 17
IEDM 2017: Gate-tunable memristors from monolayer MoS2 (V. K. Sangwan et al.,
Northwestern University)
The fabrication of gate-tunable memristors based on monolayer MoS2 grown by chemical vapor deposition (CVD).
Channel consisting of polycrystalline MoS2 films with grain sizes of 3-5 µm.
Device show switching ratios up to ~500, with the resistance in individual states being continuously gate-tunable by over
three orders of magnitude.
Device physics: resistive switching results from dynamically varying threshold voltage and Schottky barrier heights,
whose underlying physical mechanism is vacancy migration and/or charge trapping.
Top-gated devices achieve reversible tuning of threshold voltage.
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IEDM 2017: Room Temperature 2D Memristive Transistor with Optical Short Term
Plasticity (X. Xie et al., UC Santa Barbara)
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IEDM 2017: Time Dependent Variability in RRAM-based Analog Neuromorphic
System for Pattern Recognition (J. Kang et al., Peking University)
Time dependent variability (TDV) is investigated in RRAMs and its interaction with RRAM based pattern recognition.
Authors show that even when the circuits are well trained, TDV effect can introduce drops in recognition accuracy
during the operating conditions
TDV impact increases when higher resistances are used for the circuit implementation.
TDV impact can not be suppressed by scaling up with more synapses or increasing the response time
Training algorithm needs to be chosen carefully to reduce TDV impact
mmhlabs.org 11/03/2021 20
IEDM 2017: Fast, Energy-Efficient, Robust, and Reproducible Mixed-Signal Neuromorphic
Classifier Based on Embedded NOR Flash Memory Technology (X. Guo et al., UC Santa Barbara)
Designed, fabricated, and tested a prototype mixed-signal, 28×28-binary-input, 10-ouput, 3-ayer neuromorphic
network based on embedded nonvolatile floating-gate cell arrays redesigned from a commercial 180-nm NOR flash
memory.
Each array performs a very fast and energy-efficient analog vector-by-matrix multiplication, which is the bottleneck for
signal propagation in neuromorphic networks.
All functional components of the prototype circuit, including 2 synaptic arrays with 101,780 floating-gate synaptic
cells, 74 analog neurons, and the peripheral circuitry for weight adjustment and I/O operations, have a total area
below 1 mm2.
Its testing on the MNIST benchmark set has shown a classification fidelity of 94.65%, close to the 96.2% obtained in
simulation. The classification of one pattern takes <1 s time and ~20 nJ energy – both numbers >10 3× better than
those of the 28-nm IBM TrueNorth digital chip for the same task at a similar fidelity.
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IEDM 2017: Device and circuit optimization of RRAM for Neuromorphic computing –
HS Philip Wong (H. Wu et al., Tsinghua University)
A human face recognition task was demonstrated on a 1k-bit 1T1R array using an online training perceptron
network.
The RRAM device structure and materials stack were optimized to achieve reliable bidirectional analog switching
behavior.
A binarized-hidden-layer (BHL) circuit architecture is proposed to minimize the needs of A/D and D/A converters
between RRAM crossbars.
Several RRAM non-ideal characteristics were carefully evaluated for handwritten digits’ recognition task with
proposed BHL architecture and modified neural network algorithm.
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Sci. Adv. 2018: Ultralow power artificial synapses using nanotextured magnetic Josephson
junctions (M.L. Schneider et al., National Institute of Standards Technology)
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Nature Materials 2018: SiGe epitaxial memory for neuromorphic computing with reproducible
high performance based on engineered dislocations (S. Choi et al., MIT)
mmhlabs.org 11/03/2021 24
Science 2018: A bioinspired flexible organic artificial afferent nerve – Zhenan Bao (Y. Kim et al.,
Stanford University)
mmhlabs.org 11/03/2021 25
Nature Comm 2018: Neuromorphic computing with multi-memristive synapses (I. Boybat et al.,
IBM)
mmhlabs.org 11/03/2021 26
VLSI 2018: Neuromorphic Technology Based on Charge Storage Memory Devices (S.T. Lee
et al., Seoul University)
Four synaptic devices are introduced for spiking neural networks (SNNs) and deep neural networks (DNNs).
Unsupervised learning is successfully demonstrated by applying the STDP learning rule reflecting the LTP/LTD characteristics of
the fabricated TFT-type NOR flash memory cells.
Gated Schottky diode (GSD) and vertical NAND flash cell are proposed as synaptic device for DNNs.
Using matched simulation, higher learning accuracy with GSD and NAND synaptic devices are obtained compared to that with a
memristor-based synapse.
Measured synaptic properties of the vertical NAND cells are reported for the first time.
mmhlabs.org 11/03/2021 27
VLSI 2018: A Methodology to Improve Linearity of Analog RRAM for Neuromorphic
Computing (W. Wu et al., Tsinghua University)
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Nature Elect. 2018: Electronic synapses made of layered two dimensional materials– HS Philip
Wong (Y. Shi et al., Soochow University)
Authors show that multilayer hexagonal boron nitride (h-BN) can be used as
a resistive switching medium to fabricate high-performance electronic
synapses.
The devices can operate in a volatile or non-volatile regime, enabling the
emulation of a range of synaptic-like behaviour, including both short- and
longterm plasticity.
The power consumption in standby and per transition can reach as low as
0.1 fW and 600 pW, respectively, and with switching times reaching less than
10 ns, demonstrating their potential for use in energy-efficient brain-like
computing.
The volatile and non-volatile nature of the RS has been confirmed at the
nanoscale via CAFM, demonstrating excellent potential for scalability.
mmhlabs.org 11/03/2021 29
Nature Comm 2018: Artificial optic-neural synapse for colored and color-mixed pattern
recognition– HS Philip Wong (S. Seo et al., Sungkyunkwan University)
Demonstration of an optic-neural
synaptic device by implementing
synaptic and optical-sensing
functions together on h-BN/WSe2
heterostructure.
This device mimics the colored and
color-mixed pattern recognition
capabilities of the human vision
system when arranged in an optic-
neural network.
The synaptic device demonstrates
a close to linear weight update
trajectory while providing a large
number of stable conduction states
with less than 1% variation per
state.
The device operates with low
voltage spikes of 0.3 V and
consumes only 66 fJ per spike.
mmhlabs.org 11/03/2021 30
IEDM 2018: ECRAM as Scalable Synaptic Cell for High-Speed, Low-Power
Neuromorphic Computing (J. Tang et al., IBM)
Demonstration of a nonvolatile Electro-Chemical Random-Access Memory (ECRAM) based on lithium (Li) ion
intercalation in tungsten oxide (WO3) for high-speed, lowpower neuromorphic computing.
Symmetric and linear update on the channel conductance is achieved using gate current pulses, where up to 1000
discrete states with large dynamic range and good retention are demonstrated.
MNIST simulation based on the experimental data shows an accuracy of 96%.
For the first time, high-speed programming with pulse width down to 5 ns and device operation at scales down to 300×300
nm2 are shown.
It is also verified that the conductance change scales linearly with pulse width, amplitude and charge, projecting an
ultralow switching energy ~1 fJ for 100×100 nm2 devices.
mmhlabs.org 11/03/2021 31
IEDM 2018: 3D Monolithic Stacked 1T1R cells using Monolayer MoS2 FET and hBN RRAM
Fabricated at Low (150ιC) Temperature- HS Philip Wong (C.H. Wang et al., Stanford University)
Demonstration of 3D monolithically integrated two level stacked 1-transistor/1-resistor (1T1R) memory cells, using monolayer
MoS2 transistors and few-layer hBN RRAMs, fabricated at temperatures below 150 ºC.
The stacking process is scalable to an arbitrarily large number of layers and on any substrate material without foreseeable
physical limitations.
The 1T1R cells can be switched with programming current <130 μA and voltage < 1 V, close to typical CMOS logic voltages.
These cells are promising for in-memory and neuromorphic computing because (1) the hBN RRAM has gradual set and reset
switching due to multiple weak-filaments formed along local defects and (2) the MoS 2 transistor has low off-current due to the
large band gap of monolayer MoS2 (Eg > 2 eV).
Linearity of RRAM resistance change is well-controlled by the gate voltage of the transistor.
mmhlabs.org 11/03/2021 32
IEDM 2018: A Surface Potential- and Physics- Based Compact Model for 2D Polycrystalline
MoS2 FET with Resistive Switching Behavior in Neuromorphic Computing (L. Wang et al., NUS)
A surface potential- and physics based compact model for two
dimensional (2D) polycrystalline- molybdenum disulfide (MoS2) FETs
with resistive switching (RS) behavior is developed and verified by
experimental data.
This model is incorporated with the theories of thermal activation
transport, grain boundary (GB) barrier and space charge limited
current (SCLC).
Based on the GB induced disorders, the grain size, low temperature
and high electrical field dependent characteristics are studied.
The predicted transfer and output characteristics have excellent
quantitative agreement with experimental results.
Considering the hopping process induced defect- (i.e., sulfur
vacancy) redistribution, the GB (e.g., intersecting or bisecting GB)
dependent resistive switching behavior is physically investigated.
Model is implemented to simulate the synaptic activity such as short-
term/long-term plasticity, which indicates the possibility of using 2D-
FETs for neuromorphic computing applications.
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IEDM 2018: Hybrid Structure of Silicon Nanocrystals and 2D WSe2 for Broadband
Optoelectronic Synaptic Devices (Z. Ni et al., Zhejiang University)
Authors take advantage of the synergy of the strong broadband optical absorption of boron (B)-doped silicon nanocrystals (Si
NCs) and the efficient charge transport of two-dimensional (2D) WSe 2 to make synaptic devices based on the hybrid structure of
Si NCs and 2D WSe2.
The Si-NC/WSe2 synaptic devices can be optically stimulated in a broad spectral region from the ultraviolet (UV) to near-
infrared (NIR), exhibiting important synaptic functionalities.
The energy consumption of the Si-NC/WSe2 synaptic devices may be as low as ~ 75 fJ.
mmhlabs.org 11/03/2021 34
IEDM 2018: High Performance 2D Perovskite/Graphene Optical Synapses as Artificial Eyes
(H. Tian et al., Tsinghua University)
A novel concept of all distributed architecture using optical synapse has been proposed.
An ultrasensitive artificial optical synapse based on a graphene/2D perovskite heterostructure shows very high photo-
responsivity up to 730 A/W and high stability up to 74 days.
Moreover, our optical synapses has unique reconfigurable light-evoked excitatory/inhibitory functions, which is the key to enable
image recognition.
The demonstration of an optical synapse array for direct pattern recognition shows an accuracy as high as 80%.
mmhlabs.org 11/03/2021 35
Nature Mat 2019: Ionic modulation and ionic coupling effects in MoS2 devices for
neuromorphic computing (X. Zhu et al., The University of Michigan, Ann Arbor)
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Nature Elect 2019: Ternary content-addressable memory with MoS2 transistors for massively
parallel data search – HS Philip Wong (R. Yang et al., Stanford University)
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