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11/21/21 MIT MANIPAL 1

VII SEM ELECTIVE III


MODERN POWER CONVERTER
Dr. LakshmanRao S. Paragond
Associate Professor Dept of Electrical and Electronics Engg
MIT Manipal
Introduction
Introduction
• Power supply convert alternating current to the direct (DC)
current mainly convert 110-240v AC

• Three types of power supply:


– Linear power supply
– Switched mode (SMPS
– Uninterrupted (UPS)
– power SMPS stands for Switch Mode Power Supply.

• This receives 230V AC and translates it into different DC levels


such as +5V, -5V, +12V, -12V.
SMPS
Linear power supply

• Linear power supply: transformer is used to convert voltage.

• Transformer convert the line AC voltage to a smaller peak


voltage

• Rectifies AC signal produces large waveforms , capacitor filter


is used filter the rectified wave which contain small pulses
(ripple).
•Depend on requirements regulator adjust the output voltage

•Good line and load regulation lower output voltage ripples.


Linear power supply
Operation

• The power supplies used in computers are switched


mode power supplies.
• The primary power received from AC mains is
rectified and filtered as high-voltage DC.
SMPS
• Switched mode : electronic power supply with switching
regulator.

• power SMPS stands for Switch Mode Power Supply.


– This receives 230V AC and translates it into different DC
levels such as +5V, -5V, +12V, -12V.

• it is switched to a high frequency approximately 10 to 100 KHz


by a bipolar transistor and fed to the primary side (P) of a step-
down transformer.

• Uses feedback mechanism


SMPS schematic diagram
SMPS working
• Convert AC to DC voltage with rectifier

• Which is unregulated DC voltage sent it to filter

• Inverter convert DC to AC with help of power oscillator.

• Output transformer inverts AC voltage up to down to the


required output level.

• Output rectifier and filter : AC output from transformer is


rectified.

• For lower voltage uses silicon/schottky diodes used and


smoothing the rectified output by using filter.
SMPS working

This reduces the amount of the voltage passed through the
transformer.

• So the output voltage will be maintained normally.

• Then it is sent to the output of the power supply.

• A sample of this output is sent back as feedback signal for


regulation.
AT and ATX power supply

PC using XT, AT,babyAT and LPX form factor uses switch to turn
on the computer.

Newer versions of motherboard send signals through
motherboard to power supply.

– AT

– ATX/NLX
AT type SMPS

Front side power connector to SMPS

AT style SMPS provides DC output on two 6-pin
connectors(carries DC power to motherboard) and two 4-pin
connectors

Power good flag is set

output voltage stable


AT type SMPS
ATX/NLX type SMPS

Doesn't connect directly to power button

It uses five DC voltage ,20 pin connector.

– PS-ON: when it is low SMPS is ON or else OFF.

– 5VSB:supplies power supply to circuits

– PW-OK:power good signal.



Front side power connector to SMPS

AT style SMPS provides DC output on two 6-pin
connectors(carries DC power to motherboard) and two 4-pin
connectors
ATX/NLX type SMPS
Power Supply Characteristic

Wattage: The total, maximum output of the power supply in
watts,Typical power ranges are from 200W to 500W.

Efficiency :

Efficiency=Useful Power Output / Total Electrical


Power Consume.

Regulation : The ability of a SMPS to maintain an output
voltage within specified limits under varying of input voltage.
Power Supply Characteristic

Ripple : Also called AC Ripple or Periodic and Random
Deviation(PARD) or simply Noise the Power Supply of course
produces DC outputs from AC input.

Load Regulation: Sometimes called voltage load regulation.
This specification refers to the ability of the power supply to
control the output voltage level

Line Regulation: The complement of load regulation, this
parameter describes the ability of the power supply to control
its output levels
Power Supply problems

Blackouts: it is complete loss of electric power where voltage and current
drop to 0,usually caused by physical interruption in the power line due to
accidental damage by a person or act of nature, loss of AC will invariably
shutdown the computer,loss of data, reduction productivity, corrupt file
structure and damage files.


Brownouts (Sag): The under voltage condition The high load items like air
conditioners, welding machine, motor etc draw to much current that the
AC voltage level drops.

power supply will fall out which resulting in intermittent system operation.
file may be lost or corrupted on the hard drive.
ATX/NLX type SMPS
Power Supply problems

Surge: small over voltage conditions that take place over relatively long
periods and regulate power to a desired level excess energy must be
switched (in SMPS).

Spikes: A spike is a large over voltage condition that occurs in the
milliseconds. high energy switches can cause spikes on the AC line. Example
equipment like drill machine, grinders, welding equipment etc. can produce
power spikes.
Symptoms Supply problems
1. Flickering Lights,

2. . Premature Component Failure,

3. Hard Drive Crashes, 4. The PC stalls, crashes, or reboots for no apparent


reason.

4. You suffer chronic or frequent hard drive failures or file access problems.

6. The CMOS RAM or modem NVRAM periodically looses its contents or

becomes corrupted.

7. The PC behaves erratically when other high-energy devices are turned on.

8. The modem regularly looses its connection, or fails data transfers.

9. The monitor display flickers or waves.


Protection Devices

To run a computer system properly requires a steady power supply with
clean and noise free power.
Protection Devices

Surge Suppressor: simple and relatively inexpensive devices, designed to
absorb high-voltage transients produced by lightning and other high-energy
equipment.

Device inserted in AC to avoid spikes.

Avoids peak AC voltage.

Protection is accomplished by clamping (or shunting) voltages above a
certain level (usually above 200 volts).

Metal oxide varistor, or MOV, diverts the extra voltage.

Circuit Breaker:Its purpose was to protect lighting circuit wiring from
accidental short-circuits and overloads.
Protection Devices

Circuit Breaker:Its purpose was to protect lighting circuit wiring from
accidental short-circuits and overloads.

CB can be reset to function normal.
Protection Devices

Circuit Breaker:

1.actuator lever: trip/reset

2 actuator mechanism

3.Contacts:allow current

6 calibration screw:
Uninterrupted Power Supply (UPS)

An UPS provides a back up power supply when there is a power failure
from AC mains.
Uninterrupted Power Supply (UPS)

On-line UPS.
1) Linear Power Supply

2) Switched Mode Power Supply


Linear Regulated Power Supply

Switch Mode Power Supply (SMPS)


Difference between Linear Supply and Switch Mode
Power Supply
SWITCH MODE POWER SUPPLY
PARAMETERS LINEAR POWER SUPPLY
(SMPS)

Definition It completes the It converts the input


stepping down of AC signal into DC first then
voltage first then it it steps down the
converts it into DC. voltage up to desired
level.
Efficiency Low efficiency i.e. about High Efficiency i.e. about
20-25% 60-65%

Voltage Regulation Voltage regulation is Voltage regulation is


done by voltage done by feedback circuit.
regulator.
Magnetic material used Stalloy or CRGO core is Ferrite core is used
used

Weight It is bulky. It is less bulky in


comparison to linear
power supply.
Reliability More reliable in its reliability depends on
comparison to SMPS. the transistors used for
switching
Complexity Less complex than SMPS. More complex than
Linear power supply.
Transient response It possess faster It possess slower
response. response.
RF interference No RF interference RF shielding is required as
switching produces more
RF interference.

Noise and It is immune to moise and Effect of noise and


Electromagnetic electromagnetic electromagentic
interference interference. interference is quite
significant, thus EMI
filters are required.
[50khz to 1Mhz]
Applications Used in Audio frequency Used in chargers of
applications and RF mobile phones, DC
applications. motors etc.
Introduction to power
processing
Power Loss in Ideal Switch
Outline (I)

Introducing switching regulators


Basis of their analysis in steady state
Detailed study of the basic DC/DC converters in
continuous conduction mode
◦ Buck, Boost and Buck-Boost converters
◦ Common issues and different properties
◦ Introduction to the synchronous rectification
◦ Four-order converters

38
Outline (II)

Study of the basic DC/DC converters in discontinuous conduction mode


DC/DC converters with galvanic isolation
◦ How and where to place a transformer in a DC/DC converter
◦ The Forward and Flyback converters
◦ Introduction to converters with transformers and several transistors
Control circuitry for DC/DC converters
◦ Building blocks in controllers
◦ Introduction to the dynamic modelling

11/21/21 MIT MANIPAL 39


Linear DC/DC conversion (analog circuitry)
RV Q iO
ig iO ig

RL vO = (vOiO)/(vgig) vg RL vO
vg
iO  i g
vE vE -
- Av
Av  vO/vg
Feedback loop Vref Feedback loop Vref

First idea Actual implementation

 Only a few components


 Robust
 No EMI generation
 Only lower output voltage
 Efficiency depends on input/output voltages
 Low efficiency
 Bulky
11/21/21 MIT MANIPAL 40
Linear versus switching DC/DC conversion

ig Q iO S
ig iO

vg RL vO
vg RL vO
vE -
Av vE -
PWM Av
Feedback loop Vref
Feedback loop Vref
Linear
Switching (provisional)

Features:
vO_avg
vO 100% efficiency
vg
 Undesirable output voltage
waveform
t
11/21/21 MIT MANIPAL 41
Introducing the switching DC/DC conversion (I)
S vO
ig iO vO_avg
vg
vg RL vO t
The AC component must be
vE -
PWM Av removed!!
Feedback loop Vref
S
ig iO
S
ig iO
Filter
vg RL vO
vg RL vO
C filter
PWM Av -
C filter vE
Vg VO Feedback loop Vref
t
Basic switching DC/DC
It doesn’t work!!! converter (provisional)
11/21/21 MIT MANIPAL 42
Introducing the switching DC/DC conversion (II)
S iL
ig iO S
ig iO
Filter L
vg RL vO LC filter
vg RL vO
C

PWM Av -
vE LC filter

Feedback loop Vref Infinite voltage across L when


S1 is opened
Including a diode It doesn’t work either!!!

S iL
ig iO
+ L + vD VO
vD RL vO Vg
vg iD C
D - -
t
LC filter
Basic switching DC/DC converter
11/21/21 MIT MANIPAL 43
Introducing the switching DC/DC conversion (III)

iS iL
S iL iO
iO ig
ig
L
S + L C +
+ + vD vO
vD vO vg RL
vg iD RL iD D - -
D - C -

LC filter Buck converter

Starting the analysis of the Buck converter in steady state:

 L & C designed for negligible output voltage ripple (we are designing a DC/DC
converter)

 i never reaches zero (Continuous Conduction Mode, CCM)


L

 The study of the Discontinuous Conduction Mode (DCM) will done later
CCM DCM
iL
iL
t t

11/21/21 MIT MANIPAL 44


First analysis of the Buck converter in CCM
(In steady-state)
Analysis based on the specific topology of the Buck converter

iS iL iL
ig iO iO
+ L C
S + L C + +
vD vO vD RL vO
vg RL -
iD D - -

LC filter
vD
vg vD vD_avg = vO
vO vg
t t
dT The AC component is
T d: “duty cycle” removed by the filter

 This procedure is only valid for


vO = vD_avg = d·vg converter with explicit LC filter
11/21/21 MIT MANIPAL 45
Introducing another analysis method (I)

Could we use the aforementioned analysis in the


case of this converter (SEPIC)?

ig L1 C1 iD D
+ -
iS iL2 R
+
Vg VO
L2 C2 -
S

 Obviously, there is not an explicit LC filter


 Therefore, we must use another method

11/21/21 MIT MANIPAL 46


Introducing another analysis method (II)
Powerful tools to analyze DC/DC converters in steady-state

Step 1- To obtain the main waveforms (with no quantity


values) using Faraday’s law and Kirchhoff’s current and voltage
laws

Step 2- To take into account the average value of the voltage


across inductors and of the current through capacitors in
steady-state

Step 2 (bis)- To use the volt·second balance

Step 3- To apply Kirchhoff’s current and voltage laws in average


values

Step 4- Input-output power balance


11/21/21 MIT MANIPAL 47
Introducing another analysis method (III)

Any electrical circuit that operates in steady-state satisfies:

 The average voltage across an inductor is zero. Else, the net current
through the inductor always increases and, therefore, steady-state is not
achieved

 The average current through a capacitor is zero. Else, the net voltage
across the capacitor always increases and, therefore, steady-state is not
achieved

+
L vL_avg = 0
Circuit in -
Vg
steady-state
C iC_avg = 0

11/21/21 MIT MANIPAL 48


Introducing another analysis method (IV)

Particular case of many DC/DC converters in steady-state:

 Voltage across the inductors are rectangular waveforms


 Current through the capacitors are triangular waveforms
vL Same areas
+ v1

Circuit in
L vL + t
- - -v2
Vg steady-state dT
C iC T Volt·second balance:
V1dT – V2(1-d)T = 0
vL_avg = 0 iC_avg = 0
iC
+ t
-
Same areas
11/21/21 MIT MANIPAL 49
Introducing another analysis method (V)
Any electrical circuit of small dimensions (compared with the
wavelength associated to the frequency variations) satisfies:

 Kirchhoff’s current law (KCL) is not only satisfied for instantaneous current values, but
also for average current values

 Kirchhoff’s voltage law (KVL) is not only satisfied for instantaneous voltage values, but
also for average voltage values

 KVL applied to Loop1 yields:


Example vg - vL1 - vC1 - vL2 = 0
Node1 vg - vL1_avg - vC1_avg - vL2_avg = 0
iL1 L1 iC1 C1 Therefore: vC1_avg = vg
+ vL1 - + -
iS
vC1  KCL applied to Node1 yields:
+
vL2 iL1 - iC1 - iS = 0
Vg L2
S - iL1_avg - iC1_avg - iS_avg = 0
Loop1
Therefore: iS_avg = iL1_avg
11/21/21 MIT MANIPAL 50
Introducing another analysis method (VI)
A switching converter is (ideally) a lossless system

ig  Input power:
iO
Pg = vgig_avg
Switching-mode +
vg RL vO  Output power:
DC/DC converter -
PO = vOiO = vO2/RL
 Power balance:
Therefore: vgig_avg = vO2/RL
Pg = PO

 A switching-mode DC/DC converter as an ideal DC transformer


ig_avg iO
being N = vO/vg
+
RL vO
vg - ig_avg = iOvO/vg = N·iO
1:N
DC Transformer Important concept!!
11/21/21 MIT MANIPAL 51
Steady-state analysis of the Buck converter in CCM (I)

Step 1: Main waveforms. Remember that the output voltage remains constant
during a switching cycle if the converter has been properly designed
ig vS iS iL iO
+ -
Driving signal
iD + L C +
S vD vO
vg RL
- t
D -
iL
iL iO
t
S on, D L C +
vO iS
off vg RL
-
t
During dT
iL iO iD
t
S off, D L C +
RL vO dT
on -
T
During (1-d)T
11/21/21 MIT MANIPAL 52
Analysis for the Switch Closed iL iO

S on, D VL C +
RL vO
off vs -
Rearranging
During dT
The change in current while the switch is closed is
computed by modifying the preceding equation.

Analysis for the Switch Open

2
11/21/21 MIT MANIPAL 53
iL iO

S off, D L C +
RL vO
on -

During (1-d)T

11/21/21 MIT MANIPAL 54


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11/21/21 MIT MANIPAL 58
Steady-state analysis of the Buck converter in CCM (II)

Step 1: Main waveforms (cont’)


vS iL + vL - iO Driving signal
+ -
+ L C + t
S vD vO
vg RL iL
D - - iL
iL_avg
t
iL + vL - iO vL
S on, D vg-vO
L C + t
off, vO
vg RL
dT -
- vO
dT
T
iL + vL - iO
S off, D
on, L C +  From Faraday’s law:
vO
(1-d)T RL
- iL = vO(1-d)T/L

11/21/21 MIT MANIPAL 59


Steady-state analysis of the Buck converter in CCM (III)

Step 2 and 2 (bis): Average inductor voltage and capacitor current


 Average value of iC: ig iS + vL - iL iO

iC_avg = 0 iD L iC +
Node1 vO
S RL
 Volt·second balance: vg
D -
C
(vg - vO)dT - vO(1-d)T = 0
Therefore: vO = d·vg (always vO < vg)
Driving signal
Step 3: Average KCL and KVL:
t
 KCL applied to Node1 yields: iL
iL - i C - i O = 0 iL_avg
t
iL_avg - iC_avg - iO = 0 vL
vg-vO
Therefore: iL_avg = iO = vO/RL + t

Step 4: Power balance:


- - vO
dT
ig_avg = iS_avg = iOvO/vg = d·iO
T
11/21/21 MIT MANIPAL 60
Steady-state analysis of the Buck converter in CCM (IV)

ig vS iS iL iO Summary
+ -
iD + L C + Driving signal
S vD vO
vg RL
- t
D -
vD
vg
vO = d·vg (always vO < vg)
t
vSmax = vDmax = vg iL iO
iL_avg = iO = vo/RL t
iS
ig_avg = iS_avg = d·iO iL
t
iD_avg = iL_avg - iS_avg = (1-d)·iO
iD
iL = vO(1-d)T/L
t
iL_peak = iL_avg + iL/2 = iO + vO(1-d)T/(2L) dT
iS_peak = iD_peak = iL_peak T
11/21/21 MIT MANIPAL 61
11/21/21 MIT MANIPAL 62
11/21/21 MIT MANIPAL 63
1) A cuck converter has an input of 12V and its output of -18V supplying a
40W load. select the duety ratio. The switching frequency is 5 0kHz, the
inductor size such that the change in inductor current is no more than 10%
of the average inductor current, the output ripple voltage is no more than
1%. And ripple voltage C1 is no more than 5%.
 

11/21/21 MIT MANIPAL 64


11/21/21 MIT MANIPAL 65
11/21/21 MIT MANIPAL 66
2) A cuck Converter has the following parameters source voltage is 5V and
output voltage is 12V load current is 1A, switching frequency is 100khz.
Determine the value of the energy storing capacitor such that the
capacitor voltage ripple should be less than 3%.
 

11/21/21 MIT MANIPAL 67


11/21/21 MIT MANIPAL 68
11/21/21 MIT MANIPAL 69
Power supplies for telecommunications applications may require high currents at
low voltages. Design a buck converter that has an input voltage of 3.3 V and an
output voltage of 1.2 V. The output current varies between 4 and 6 A. The output
voltage ripple must not exceed 2 percent. Specify the inductor value such that the
peak-to-peak variation in inductor current does not exceed 40 percent of the
average value. Determine the required
capacitor.

The duty ratio is determined

11/21/21 MIT MANIPAL 70


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11/21/21 MIT MANIPAL 74
11/21/21 MIT MANIPAL 75
Steady-state analysis of the Boost converter in CCM (I)

Can we obtain vO > vg?  Boost converter


Step 1: Main waveforms Driving signal
ig + vL - iL iD iO
t
L iS D + + iL
vO iL
vg S C - RL -
t
iS
iL + vL -
t
S on, D off, L
during dT vg iD
t
iL + v L - iO dT
T
S off, D on, L C +
during (1-d)T RL vO  From Faraday’s law:
-
iL = vgdT/L
11/21/21 MIT MANIPAL 76
Steady-state analysis of the Boost converter in CCM (II)

Step 2 and 2 (bis): Average values Node1


ig + vL - iL iD iO
 Average value of iC:
iC_avg = 0 L iC
iS D + +
vO
 Volt·second balance: vg S C - RL -
vgdT - (vO - vg)(1-d)T = 0
Therefore: vO = vg/(1-d) (always vO > vg)
Driving signal
Step 3: Average KCL and KVL:
t
 KCL applied to Node1 yields: iD
iD_avg iL
iD - i C - i O = 0
t
iD_avg - iC_avg - iO = 0 vL
vg
Therefore: iD_avg = iL_avg(1-d) = iO = vO/RL t

Step 4: Power balance:


dT -(vO-vg)
ig_avg = iL_avg = iOvO/vg = iO/(1-d)
T
11/21/21 MIT MANIPAL 77
Steady-state analysis of the Boost converter in CCM (III)

ig + vL - iL - vD + iO Summary
L iC Driving signal
iS D iD +
+ RL vO t
vg S vS C -
- vD
vO
t
vO = vg/(1-d) (always vO > vg)
iL
vSmax = vDmax = vO
t
iL_avg = ig_avg = iO/(1-d) = vo/[RL(1-d)] iS
iL
iS_avg = d·iL_avg = d·vo/[RL(1-d)] t

iD_avg = iO iL = vgdT/L iD


iO

iL_peak = iL_avg + iL/2 = iL_avg + vgdT/(2L) dT t

iS_peak = iD_peak = iL_peak T


11/21/21 MIT MANIPAL 78
Steady-state analysis of the Buck-Boost converter in CCM (I)

Can we obtain either vO < vg or vO > vg  Buck-Boost converter


ig iS iD iO
Driving signal
iL D
+ - -
S vO t
vL C + RL +
vg L - iL
iL
ig t
+ iS
iL
S on, D off, vL
during dT vg L
t
-
Charging stage iD
iO t

iL + dT
S off, D on, C - -
vL RL
vO T
during (1-d)T L - + +
 From Faraday’s law:
Discharging stage iL = vgdT/L
11/21/21 MIT MANIPAL 79
Steady-state analysis of the Buck-Boost converter in CCM (II)

Step 2 and 2 (bis): Average values Node1


ig iS iD
 Average value of iC: iO

iC_avg = 0 iL D iC
+ - -
S vO
 Volt·second balance: vL C + RL +
vg L -
vgdT - vO(1-d)T = 0
Therefore: vO = vgd/(1-d)
Driving signal
Step 3: Average KCL and KVL:
t
 KCL applied to Node1 yields: iD
iD_avg iL
iD - i C - i O = 0 t
iD_avg - iC_avg - iO = 0 vL
vg
Therefore: iD_avg = iL_avg(1-d) = iO = vO/RL t

Step 4: Power balance: -vO


dT
ig_avg = iS_avg = iOvO/vg = iOd/(1-d) T
11/21/21 MIT MANIPAL 80
Steady-state analysis of the Buck-Boost converter in CCM (III)

ig i iD + vD - iO Summary
+ vS - S
iL Driving signal
+ D - -
S vO t
vL + RL +
vg L C
- vD
vO + v g
t
vO = vgd/(1-d) (both vO < vg and vO > vg)
iL
vSmax = vDmax = vO + vg
t
iD_avg = iO iL = vgdT/L iS
iL
t
iL_avg = iD_avg/(1-d) = iO/(1-d) = vo/[RL(1-d)]
iD
iS_avg = ig_avg = d·iL_avg = d·vo/[RL(1-d)] iO

iL_peak = iL_avg + iL/2 = iL_avg + vgdT/(2L) dT t

iS_peak = iD_peak = iL_peak T


11/21/21 MIT MANIPAL 81
Applications of Buck boost converter
•It is used in the self regulating power supplies.
•It has consumer electronics.
•It is used in the Battery power systems.
•Adaptive control applications.
•Power amplifier applications.

Advantages of Buck Boost Converter


•It gives higher output voltage.
•Low operating duct cycle.
•Low voltage on MOSFETs

11/21/21 MIT MANIPAL 82


Common issues in basic DC/DC converters (I)

L + +
S vO Complementary
vg C - RL
D - switches + inductor
Buck
S D

L d 1-d
D + + + +
vO vO
vg C - RL vg C - RL -
S - L
Boost

D +
- vO Voltage source
S
vg L C + RL -

Buck-Boost The inductor is a energy buffer to


connect two voltage sources
11/21/21 MIT MANIPAL 83
Common issues in basic DC/DC converters (II)
Diode turn-off
We start when the diode is on
vg
 The diode turns off when the
L + +
vO transistor turns on
vg S C - RL
D -
Buck  The diode reverse recovery time is
of primary concern evaluating
switching losses
L D  Schottky diodes are desired from
C + +
vO
vg S vO - RL -
this point of view
Boost  In the range of line voltages, SiC
diodes are very appreciated
vO + vg
 Boost converter is word-wide used
D C + as a part of the modern off-line power
- vO
S supplies (Power Factor Corrector, PFC)
vg L Buck- + RL -
Boost
11/21/21 MIT MANIPAL 84
Comparing basic DC/DC converters (I)
Generalized study as DC transformer (I)
ig iO

L ig_avg iO
+ +
S vO
vg C - RL
D - +
RL vO
Buck vg -
ig iO 1:N
DC Transformer
L D + +
vO
vg S C - RL -

Boost  Buck: N= d (only vO < vg)


ig iO
 Boost: N= 1/(1-d) (only vO > vg)
D
- +
S vO  Buck-Boost: N= -d/(1-d)
C + RL -
vg L (both vO < vg and vO > vg)
Buck-Boost
11/21/21 MIT MANIPAL 85
Comparing basic DC/DC converters (II)
Generalized study as DC transformer (II)
ig_avg iO

+
RL vO
vg -
1:N
DC Transformer

ig_avg = iON = iOd/(1-d)

 Buck: ig_avg = iON = iOd

 Boost: ig_avg = iON = iO/(1-d)

Buck-Boost: ig_avg = iON = - iOd/(1-d)

11/21/21 MIT MANIPAL 86


Comparing basic DC/DC converters (III)

Electrical stress on components (I)

ig iS vS iO
+ -
iD + +
S vD RL vO
vg -
D -
DC/DC converter

 Buck:  Boost:  Buck-Boost:

vSmax = vDmax = vg vSmax = vDmax = vO vSmax = vDmax = vO + vg

iS_avg = ig_avg iL_avg = ig_avg iS_avg = ig_avg

iL_avg = iO iD_avg = iO iD_avg = iO

iD_avg = iL_avg - iS_avg iS_avg = iL_avg - iD_avg iL_avg = iS_avg + iD_avg


11/21/21 MIT MANIPAL 87
Comparing basic DC/DC converters (IV)
Example of electrical stress on components (I)
1 A (avg) 2A
vS_max = vD_max = 100 V
L + + iS_avg = iD_avg = 1 A
S 50 V
C - RL
100 V D - iL_avg = 2 A
100 W Buck, 100% efficiency FOMVA_S = FOMVA_D = 100 VA

1 A (avg) 2A vS_max = vD_max = 150 V


D iS_avg = 1 A
- -
S 50 V iD_avg = 2 A
100 V C + RL +
L
iL_avg = 3 A
100 W Buck-Boost, 100% efficiency FOMVA_S = 150 VA

 Higher electrical stress in the case of Buck- FOMVA_D = 300 VA


Boost converter
 Therefore, lower actual efficiency
11/21/21 MIT MANIPAL 88
Comparing basic DC/DC converters (V)
Example of electrical stress on components (II)
4 A (avg) 2A
vS_max = vD_max = 50 V
L D iS_avg = iD_avg = 2 A
+ +
25 V C - RL 50 V iL_avg = 4 A
S -
FOMVA_S = FOMVA_D = 100 VA
100 W Boost, 100% efficiency

4 A (avg) 2A

D vS_max = vD_max = 75 V
- -
S 50 V iS_avg = 4 A
25 V C + RL +
L
iD_avg = 2 A
100 W Buck-Boost, 100% efficiency iL_avg = 6 A
FOMVA_S = 300 VA
 Higher electrical stress in the case of Buck-
Boost converter FOMVA_D = 150 VA
 Therefore, lower actual efficiency
11/21/21 MIT MANIPAL 89
Comparing basic DC/DC converters (VI)

 Price to pay for simultaneous step-down and step-


up capability:

Higher electrical stress on components and,


therefore, lower actual efficiency

 Converters with limited either step-down or step-up


capability:

Lower electrical stress on components and,


therefore, higher actual efficiency

11/21/21 MIT MANIPAL 90


Comparing basic DC/DC converters (VII)

Example of power conversion between similar voltage


levels based on a Boost converter

6.12 A (avg) L 5A
vS_max = vD_max = 60 V
1.12 A D + + iS_avg = 1.12 A
(avg) C - RL 60 V iD_avg = 5 A
50 V S -
iL_avg = 6.12 A
300 W Boost, 98% efficiency FOMVA_S = 67.2 VA
FOMVA_D = 300 VA

Very high efficiency can be achieved!!!

11/21/21 MIT MANIPAL 91


Comparing basic DC/DC converters (VIII)

The opposite case: Example of power conversion between


very different and variable voltage levels based on a Buck-
Boost converter
20 - 2 A (avg) 5A

D
- -
S 60 V
C + RL +
20 - 200 V L vS_max = vD_max = 260 V
iS_avg_max = 20 A
300 W Buck-Boost, 75% efficiency
iD_avg_max = 5 A
Remember previous example: iL_avg = 25 A
FOMVA_S = 67.2 VA
FOMVA_S_max = 5200 VA
FOMVA_D = 300 VA
FOMVA_D = 1300 VA

High efficiency cannot be achieved!!!


11/21/21 MIT MANIPAL 92
Comparing basic DC/DC converters (IX)

One disadvantage exhibited by the Boost converter:


The input current has a “direct path” from the input voltage source to the
load. No switch is placed in this path. As a consequence, two problems arise:

 Large peak input current in start-up


 No over current or short-circuit protection can be easily implemented
(additional switch needed)

L D + +
vg vO
S C - RL -
Boost

Buck and Buck-Boost do not exhibit these problems


11/21/21 MIT MANIPAL 93
Synchronous rectification (I)

 To use controlled transistors (MOSFETs) instead of diodes to achieve high


efficiency in low output-voltage applications
 This is due to the fact that the voltage drop across the device can be
lower if a transistor is used instead a diode
 The conduction takes place from source terminal to drain terminal
 In practice, the diode (Schottky) is not removed

L idevice
S L
D MOSFET S1
Diode S2
L
S1
S2 vdevice
11/21/21 MIT MANIPAL 94
Synchronous rectification (II)

 In converters without a transformer, the control circuitry must


provide proper driving signals
 In converters with a transformer, the driving signals can be obtained
from the transformer (self-driving synchronous rectification)
 Nowadays, very common technique with low output-voltage Buck
converters

L
L S2 + +
S1 S1 vO
vg C - RL -
vO D
S2
Synchronous Buck
Q’ -
PWM Av
Q Vref
Feedback loop

11/21/21 MIT MANIPAL 95


Input current and current injected into the output RC cell (I)

 If a DC/DC converter were an ideal DC transformer, the input and output


currents should also be DC currents
 As a consequence, no pulsating current is desired in the input and output
ports and even in the current injected into the RC output cell

ig iS vS iRC
+ -
iD + + +
S vD v
vg C - RL - O
D -

Desired current DC/DC converter


Desired current
ig iRC

t t
11/21/21 MIT MANIPAL 96
Input current and current injected into the output RC cell (II)
ig iRC
ig iRC
L + +
S vO
vg C - RL
t D - t
Noisy Buck Low noise
ig iRC

ig L D + +
iRC
vO
vg S C - RL -
t t
Low noise Boost Noisy
ig iRC

ig D
-
+
vO
iRC
S -
C + RL
t vg L t
Noisy Buck-Boost Noisy
11/21/21 MIT MANIPAL 97
Input current and current injected into the output RC cell (III)

ig iRC Adding EMI filters

LF + L + +
S vO
vg CF - C - RL
D -

Filter Buck
ig iRC

L D LF
+ + +
R vO
vg S CF - C - L -

Boost Filter
ig iRC

LF D LF
+ - - -
CF S CF vO
vg - + C + RL +
L

Filter
Buck-Boost Filter
11/21/21 MIT MANIPAL 98
Four-order converters (converters with integrated filters)
ig L1 C1 iD
-
D
 Same v /v as Buck-Boost
O g
+
iS vC1 iL2
+ RL  Same stress as Buck-Boost
vg L2 C2 -
vO v =v C1 g

S
 Filtered input
SEPIC ig L1 C1 iL2 L2
-
 Same vO/vg as Buck-Boost iS
+
vC1 iD RL
-
 Same stress as Buck-Boost vg vO
D C2 +
v =v +v
C1 g O S

 Filtered input and output Cuk


iS iL2
C1
- +
S vC1 L2
RL  Same v /v as Buck-Boost
O g
+
vg
L1
D
C2 vO  Same stress as Buck-Boost
-
iL1
iD v =v C1 O

Zeta  Filtered output


11/21/21 MIT MANIPAL 99
DC/DC converters operating in DCM (I)

 Only one inductor in basic DC/DC converters


 The current passing through the inductor decreases when the load
current decreases (load resistance increases)
iL iL
iL_avg
L iO
ig t

+ Driving signal
S RL vO t
vg D -
dT
DC/DC converter
T

 Buck:  Boost:  Buck-Boost:

iL_avg = iO iL_avg = iO/(1-d) iL_avg = iS_avg + iD_avg = diO/(1-d) + iO

= iO/(1-d)
11/21/21 MIT MANIPAL 100
DC/DC converters operating in DCM (II)

 When the load decreases, the converter goes toward Discontinuous


Conduction Mode (DCM)

RL_1
iL
iL_avg
Decreasing load

t
Operation in CCM
RL_2 > RL_1
iL
iL_avg

t
RL_crit > RL_2 Boundary between CCM
iL iL_avg
and DCM
t
It corresponds to RL = R L_crit
11/21/21 MIT MANIPAL 101
DC/DC converters operating in DCM (III)

What happens when the load decreases below the critical value?

RL_crit  DCM starts if a diode is used as


iL iL_avg rectifier
Decreasing load

t  If a synchronous rectifier (SR) is used,


RL_3 > RL_crit the operation depends on the driving
iL iL_avg signal

CCM w. SR
t  CCM operation is possible with
synchronous rectifier with a proper
driving signal (synchronous rectifier with
signal almost complementary to the main
RL_3 > RL_crit
iL iL_avg transistor)

t
DCM w. diode

11/21/21 MIT MANIPAL 102


DC/DC converters operating in DCM (IV)

Remember:
iL_avg = iO (Buck) or iL_avg = iO/(1-d) (Boost and Buck-Boost)

RL > RL_crit  For a given duty cycle, lower average


CCM w. SR value (due to the negative area)  lower
iL iL_avg
output current for a given load  lower
output voltage
t

RL > RL_crit  For a given duty cycle, higher average


DCM w. diode value (no negative area)  higher output
iL iL_avg current for a given load  higher output
voltage
t

The voltage conversion ratio vO/vg is always higher in DCM


than in CCM (for a given load and duty cycle)
11/21/21 MIT MANIPAL 103
DC/DC converters operating in DCM (V)

How can we get DCM (of course, with


a diode as rectifier) ?
iL
After decreasing the
inductor inductance

t
iL
After decreasing the
switching frequency

t
iL After decreasing the
load (increasing the
load resistance)
t

11/21/21 MIT MANIPAL 104


11/21/21 MIT MANIPAL 105
11/21/21 MIT MANIPAL 106
11/21/21 MIT MANIPAL 107
11/21/21 MIT MANIPAL 108
Buck Converter: Waveforms at the Boundary of
Cont./Discont. Conduction
• ILB = critical current below which inductor current
becomes discontinuous

CHAPTER 7 INTRODUCTION TO DC/DC


Power Electronics
CONVERTERS
Buck Converter: Discontinuous Conduction
Mode
• Steady state; inductor current discontinuous (i.e. it goes
zero for a time)
• Note that output voltage depends on load current

Vo D2

Vd 0.25I o
D2 
I LB ,max

CHAPTER 7 INTRODUCTION TO DC/DC


Power Electronics
CONVERTERS
Buck: Limits of Discontinuous Conduction

• The duty-ratio of 0.5 has the highest value of the critical


current
• For low output current, buck goes discontinuous

CHAPTER 7 INTRODUCTION TO DC/DC


Power Electronics
CONVERTERS
Buck: Limits of Cont./Discont. Conduction

• In regulated power supply, Vd may fluctuate but Vo is


kept constant by control of D

CHAPTER 7 INTRODUCTION TO DC/DC


Power Electronics
CONVERTERS
Buck Conv.: Output Voltage Ripple
• ESR is assumed to be zero; continuous conduction
mode

CHAPTER 7 INTRODUCTION TO DC/DC


Power Electronics
CONVERTERS
Buck Conv.: Output Voltage Ripple
• ESR is assumed to be
zero
Vo (1  D )T Vo (1  D )
iL, pp  
L f sw L

 1  T  i L, pp  Vo (1  D )
Q      
 2  2  2  8 f sw2 L

Q Vo (1  D)
vo , pp  
C 8 f sw2 LC

CHAPTER 7 INTRODUCTION TO DC/DC


Power Electronics
CONVERTERS
Buck Conv.: Calculations
• Shown for SPICE example with fsw = 200 kHz, D = 0.5, L
= 33 µH, C = 10 µF, Io = 1A

Vo (1  D ) (5)(1  0.5)
iL , pp   6
 0.38 A
f sw L ( 2  10 )(33  10 )
5

Q Vo (1  D ) (5)(1  0.5)
vo , pp    6 6
 24 mV
C 2
8 f sw LC 8( 2  10 ) (33  10 )(10  10 )
5 2

CHAPTER 7 INTRODUCTION TO DC/DC


Power Electronics
CONVERTERS
DC/DC converters operating in DCM (VI)
Three sub-circuits instead of two:
Driving signal  The transistor is on. During d·T
 The diode is on. During d’·T
iL t
 Both the transistor and the diode are off. During (1-
iL_avg d-d’)T
t Example: Buck-Boost converter
iD
ig iS iD iO
iD_avg
iL D
vL t + - -
vg S vO
vL C + RL +
+ vg L -
- -vO t ig iO
d·T d’·T
+ iL + iL +
T iL C - -
vL vL vO vL
vg L - + RL + L -
L -
During d·T During d’·T During (1-d-d’)T
11/21/21 MIT MANIPAL 116
DC/DC converters operating in DCM (VII)
Voltage conversion ratio vO/vg for the Buck-Boost converter in DCM
ig +
iL
Driving signal vL From Faraday’s law:
vg L - vg = LiL_max/(dT)
iL iL_max t During d·T
iL_avg iO
iL +
C - - And also:
iL_max t vL vO
iD L - + RL + vO = LiL_max/(d’T)
iD_avg
During d’·T
vL t
vg Also:
+ iD_avg = iL_maxd’/2, iD_avg = vO/R
- -vO t
d·T d’·T And finally calling M = vO/vg we obtain:
T
M =d/(k)1/2 where k =2L/(RT)
11/21/21 MIT MANIPAL 117
DC/DC converters operating in DCM (VIII)

The Buck-Boost converter just on the boundary RL = RL_crit


iL iL_avg
between DCM and CCM t

 Due to being in DCM: M = vO/vg = d/(k)1/2, where: k =


2L/(RT)
 Due to being in CCM: N = vO/vg = d/(1-d)
 Just on the boundary: M = N, R = Rcrit, k = kcrit
 Therefore: kcrit = (1-d)2
 The converter operates in CCM if: k > kcrit
 The converter operates in DCM if: k < kcrit

11/21/21 MIT MANIPAL 118


DC/DC converters operating in DCM (IX)

Summary for the basic DC/DC converter

Buck Boost Buck-Boost

N=d 1 d
N= N=
1-d 1-d
2
M= d
4d2 M=
4k 1+ 1+
1+ 1+ 2 k k
d M=
2
kcrit = (1-d)2
kcrit = (1-d) kcrit = d(1-d)2
kcrit_max = 1
kcrit_max = 1 kcrit_max = 4/27
k = 2L/(RT)
11/21/21 MIT MANIPAL 119
DC/DC converters operating in DCM (X)
CCM versus DCM
Driving signal Driving signal
t
vD t vD

t - Lower conduction losses in t


CCM (lower rms values)
iL iL
iL_avg - Lower losses in DCM when S iL_avg
turns on and D turns off
iS t - Lower losses in CCM when S iS t
turns off

t - Lower inductance values in t


iD DCM (size?) iD

dT t dT t
T T

11/21/21 MIT MANIPAL 120


Achieving galvanic isolation in DC/DC converters (I)
A two-winding magnetic device is needed
 Parts and mounting procedure:
- Bobbin
- Windings
- Magnetic core
- Attaching the cores

11/21/21 MIT MANIPAL 121


SEPIC Converter
• Single-ended primary inductance converter (SEPIC)
• Can buck or boost the voltage
• Note that output is similar to buck-boost, but without a
phase inversion
Vo D

Vd 1  D

CHAPTER 7 INTRODUCTION TO DC/DC


Power Electronics
CONVERTERS
CHAPTER 7 INTRODUCTION TO DC/DC
Power Electronics
CONVERTERS
Kirchhoff’s voltage law around the path containing V , L , C , and L gives
s 1 1 2

Using the average of these voltages,

showing that the average voltage across the capacitor C is1

When the switch is closed, the diode is off. The voltage across L for the
1

interval DT is

When the switch is open, the diode is on. Kirchhoff’s voltage law around the
outermost path gives

11/21/21 MIT MANIPAL 124


Assuming that the voltage across C remains constant at its average value of
1

Vs

for the interval (1 D)T. Since the average voltage across an inductor is zero for
periodic operation,

where D is the duty ratio of the switch. The result is

11/21/21 MIT MANIPAL 125


Assuming no losses in the converter, the power supplied by the source is the
same as the power absorbed by the load.

Power supplied by the dc source is voltage times the average current, and the
source current is the same as the current in L . 1

Output power can be expressed as

Solving for average inductor current, which is also the average source
current,

11/21/21 MIT MANIPAL 126


The variation in i when the switch is closed is found from
L1

For L , the average current is determined from Kirchhoff’s current law at the
2

node where C , L , and the diode are connected.


1 2

The average current in each capacitor is zero, so the average current in L is


2

11/21/21 MIT MANIPAL 127


The variation in i is determined from the circuit when the switch is closed.
L2

Using Kirchhoff’s voltage law around the path of the closed switch, C , and L
1 2

with the voltage across C assumed to be a constant V , gives


1 s

The output stage consisting of the diode, C , and the load resistor is the same as in
2

the boost converter, so the output ripple voltage is

11/21/21 MIT MANIPAL 128


11/21/21 MIT MANIPAL 129
Reliability and efficiency

The voltage drop and switching time of diode D1 is critical to a SEPIC's


reliability and efficiency. The diode's switching time needs to be extremely
fast in order to not generate high voltage spikes across the inductors, which
could cause damage to components. Fast conventional diodes or 
Schottky diodes may be used.

The resistances in the inductors and the capacitors can also have large
effects on the converter efficiency and output ripple. Inductors with lower
series resistance allow less energy to be dissipated as heat, resulting in
greater efficiency (a larger portion of the input power being transferred to
the load).

Capacitors with low equivalent series resistance (ESR) should also be used
for C1 and C2 to minimize ripple and prevent heat build-up, especially in C1
where the current is changing direction frequently.

CHAPTER 7 INTRODUCTION TO DC/DC


Power Electronics
CONVERTERS
Disadvantages

Like the buck–boost converter, the SEPIC has a pulsating output current.


The similar Ćuk converter does not have this disadvantage, but it can only
have negative output polarity, unless the isolated Ćuk converter is used.

•Since the SEPIC converter transfers all its energy via the series capacitor,
a capacitor with high capacitance and current handling capability is
required.

•The fourth-order nature of the converter also makes the SEPIC converter
difficult to control, making it only suitable for very slow varying
applications.

CHAPTER 7 INTRODUCTION TO DC/DC


Power Electronics
CONVERTERS
Typical SEPIC Applications

Typical SEPIC applications include the following:

•Battery-operated equipments and handheld devices

•LED lighting applications

•DC power supplies with a wide range of input voltages

Solar PV Array Fed Water Pumping System Using SEPIC Converter Based
BLDC Motor Drive 

CHAPTER 7 INTRODUCTION TO DC/DC


Power Electronics
CONVERTERS
The converter should meet certain standards 6V<Vin< 0.5 A An
acceptable output voltage ripple is Vo, pp< 0.1 V Calculate Duty Cycle
and Inductance

Duty Cycle Calculation:

CHAPTER 7 INTRODUCTION TO DC/DC


Power Electronics
CONVERTERS
CHAPTER 7 INTRODUCTION TO DC/DC
Power Electronics
CONVERTERS
Transformer isolation
Objectives:
• Isolation of input and output ground connections, to mesafety
requirements
Reduction of transformer size by incorporating high
frequency isolation transformer inside converter
Minimization of current and voltage stresses when a
large step-up or step-down conversion ratio is needed —
use transformer turns ratio
Obtain multiple output voltages via multiple transformer
secondary windings and multiple converter secondary
circuits

11/21/21 MIT MANIPAL 135


Two Type of Transformer Configuration

Non-Center Tap and Center Tap

Half Bridge Full Bridge


Single Ended

Push-Pull Transformer Configuration

11/21/21 MIT MANIPAL 136


Achieving galvanic isolation in DC/DC converters (II)
The volt·second balance in the case of magnetic devices
with two windings
From Faraday’s law:
+ + vi = ni d/dt B
v1
-
v2
-

= B - A = (vi/ni)·dt
A
n1:n2 In steady-state:
vg ()in a period= 0
Circuit in steady-
state And therefore:
(vi /ni)avg = 0

Volt·second balance: If all the voltages are DC voltages, then:


 CCM: dT(V1/n1) – (1-d)T(V2/n2) = 0
 DCM: dT(V1/n1) –d’T(V2/n2) = 0
11/21/21 MIT MANIPAL 137
Achieving galvanic isolation in DC/DC converters (III)
Transformer models

Model 1 Ll1 Model 2 Ll2

Lm1 Lm1
n1:n2 n1:n2 n1:n2

Model 1: Model 2: Model 3:


Circuit Theory Magnetic transformer Magnetic transformer
element with perfect coupling with real coupling

At least the magnetizing inductance must be taken


into account analyzing DC/DC converters

11/21/21 MIT MANIPAL 138


A simple transformer model

11/21/21 MIT MANIPAL 139


Achieving galvanic isolation in DC/DC converters (IV)
Where must we place the transformer?

Lm1
n1:n2
In a place where the
average voltage is zero
ig iO
vS
+ - + +
vD RL vO
vg D - -
S
DC/DC converter

11/21/21 MIT MANIPAL 140


Achieving a Buck converter with galvanic isolation (I)

L + + No place with average


S vO
vg C - RL - voltage equal to zero
D Buck

New node with zero average voltage

L + +
S vO
vg C - RL -
D

S on S off D2

L + +
S RL vO
vg Lm1 C - -
D1
n1:n2
It does not work!!
11/21/21 MIT MANIPAL 141
Achieving a Buck converter with galvanic isolation (II)

A circuit to a apply a given DC voltage


across Lm1 when S is off
vextra S off
S on n3 D2
L + +
D1 RL vO
vg Lm1 C - -
n1:n2

n1:n1:n2 D2
L + +
D1 RL vO Standard design:
C - -
Lm1
vextra = vg
vg n3 = n 1
D3 Final implementation: the
S Forward converter

11/21/21 MIT MANIPAL 142


Achieving a Buck-Boost converter with galvanic isolation (I)

D There is a place with


C - -
S vO average voltage equal to
Buck- + RL +
vg L zero: the inductor
Boost

Inductor and transformer


integrated into only one
D - - magnetic device (two-winding
S RL vO inductor)
vg Lm1 C + +
L
n1:n2

S on S off

D - -
S RL vO
vg L C + +
n1:n2

11/21/21 MIT MANIPAL 143


b) Inductor L is wound with two
a) Buck Boost Converter parallel wires

c) Inductor windings are Isolated ,


leading to the fly back converter d) With a 1:n Turns ratio

11/21/21 MIT MANIPAL 144


Flyback Converter

11/21/21 MIT MANIPAL 145


a) Equivalent Circuit of Transformer model

b) When switch is closed c) when switch is Opened

11/21/21 MIT MANIPAL 146


Analysis for the Switch Closed On the source side of the transformer

Solving for the change in current in the transformer magnetizing inductance

On the load side of the transformer

11/21/21 MIT MANIPAL 147


Analysis for the Switch Open

Voltages and currents for an open switch are

Solving for the change in transformer magnetizing inductance with the


switch open

11/21/21 MIT MANIPAL 148


Since the net change in inductor current must be zero over one period for
steady-state operation

Other currents and voltages of interest while the switch is open are

11/21/21 MIT MANIPAL 149


The power absorbed by the load resistor must be the same as that supplied by
the source for the ideal case, resulting in

11/21/21 MIT MANIPAL 150


Output Voltage of Fly Back converter Average Value of Inductor Current

Average Value of source current is related to average


The diode Switch and Capacitor current magnetizing current

Solving for ILm is

11/21/21 MIT MANIPAL 151


Maximum and Minimum Value of Inductance Current

Out Put Ripple of Fly Back Converter

The expression For Minimum Value of Inductance

11/21/21 MIT MANIPAL 152


The Flyback converter
Analysis in steady-state in CCM

 Volt·second balance:

n1:n2 D dTvg/n1 - (1-d)TvO/n2 = 0


+ +  vO = vg(n2/n1)·d/(1-d)
L1 L2 RL vO
C - -  Therefore, the result is the
same as Buck-Boost converter
vg
replacing vg with vgn2/n1
S
 vSmax = vg + vOn1/n2
 vDmax = vgn2/n1 + vO
 Very simple topology
 Useful for low-power, low-cost converters
 Critical “false transformer” (two-winding inductor) design
11/21/21 MIT MANIPAL 153
The Forward converter
As the Buck converter replacing vg with vgn2/n1
n1:n1:n2 D2 iL iO
L + + L C +
vO RL vO
D1 C - RL vgn2/n1 -
Lm1 -

D3 Inductor magnetizing
vg S & D2 on, D1 stage
S & D2 off, D1
S & D3 off, im1
on, during dT
+
vL
vg Lm1
during (1-d)T D3 on, during d’T -
iL iO im1 Transformer
+ magnetizing stage
L C +
vO vg vL
RL Lm1 vO = dvgn2/n1
- -
Inductor demagnetizing Transformer reset vSmax = 2 vg
stage stage dmax = 0.5 (reset transformer)
11/21/21 MIT MANIPAL 154
When Switch is Closed

Relation between input and Output

11/21/21 MIT MANIPAL 155


11/21/21 MIT MANIPAL 156
11/21/21 MIT MANIPAL 157
1) The Flyback converter has the following parameters Vs=24V,
N1/N2=3, Lm=500µH, R= 50Ω C=200µF switching frequency is
40kHz and V0=5V. Determine the Duety ratio the maximum
current through the magnetizing inductor and the maximum
change in the output voltage.

11/21/21 MIT MANIPAL 158


11/21/21 MIT MANIPAL 159
11/21/21 MIT MANIPAL 160
11/21/21 MIT MANIPAL 161
2) The Flyback converter has the following parameters Vs=36V,D=0.4, N2/N1=2,
Lm=100µH, R= 20Ω C=50µF and switching frequency is 100kHz. Determine the
output b) Maximum and minimum inductor current and output voltage ripple.

11/21/21 MIT MANIPAL 162


11/21/21 MIT MANIPAL 163
11/21/21 MIT MANIPAL 164
11/21/21 MIT MANIPAL 165
11/21/21 MIT MANIPAL 166
3) Design a Flyback converter has the following parameters V0=36V from 3.3
V source. The output current is 0.1A and the turns ratio is, N2/N1=16. The
magnitizing current ripple should not ecxceed 40% of average and output
ripple should be limited to2%. Assuming continuous current mode ideal
componats and switching frequency is 100KhZ.

11/21/21 MIT MANIPAL 167


11/21/21 MIT MANIPAL 168
11/21/21 MIT MANIPAL 169
1) Design a buck converter is having a switching time is 5μs VD =0.7 I0min and Io
Max is 0.5A and 10A and duty ratio is 50% find a) output voltage V0 if source
voltage is (Vs) 10V, in continuous conduction mode b ) output voltage V0 if
source voltage is (Vs) 10V, in dis continuous conduction mode c) Inductor L.

Vo = VsD= 5V

11/21/21 MIT MANIPAL 170


11/21/21 MIT MANIPAL 171
11/21/21 MIT MANIPAL 172
2) Design a buck converter for continuous inductor current with
the following specifications Output Voltage Vo=18V, R=10ohm
output Voltage ripple≤0.5%. The input voltage is 48V and the
switching frequency f=40khz. Determine duty ratio, the value of
inductor L and C.The average, maximum and minimum value of IL.

11/21/21 MIT MANIPAL 173


11/21/21 MIT MANIPAL 174
11/21/21 MIT MANIPAL 175
3. Design a buck- boost converter has the input voltage of24V, duty
cycle is 0.4 and load is connected 5 ohm inductor is 20 µH,
capacitance is 80µF and switching frequency is 100kHz. Determine
the output voltage , maximum and minimum inductor current and
out put voltage ripple. What are the features of buck boost
converter.

11/21/21 MIT MANIPAL 176


11/21/21 MIT MANIPAL 177
11/21/21 MIT MANIPAL 178
4) The capacitor current of a buck-boost converter is shown in Fig.
Determine duty ratio, maximum inductor current, minimum inductor
current, average source current and average diode current.
ic(t)

3 .6 7 A

1 .6 7 A

4s 10s t

-4 A
F ig .Q 1 C

11/21/21 MIT MANIPAL 179


11/21/21 MIT MANIPAL 180
11/21/21 MIT MANIPAL 181
5) The SEPIC circuit has the following parameters:
V =9 V, D= 0.4, f= 100 kHz, L =L =90 µH,C =C =80 µF,I =2 A
s 1 2 1 2 o

Determine the output voltage; the average, maximum, and minimum inductor
currents; and the variation in voltage across each capacitor

11/21/21 MIT MANIPAL 182


11/21/21 MIT MANIPAL 183
11/21/21 MIT MANIPAL 184
6) A Forward converter is operating in continuous conduction mode has the
following specifications: Vg = 30 V, D = 0.3, N1/N2 = 2, N1/N3 = 1. R=6Ω,C=50µF
and switching frequency is 100khz. And Filter inductance is 0.5mH. Determine
the output voltage, maximum and minimum value of inductor current and
output voltage ripple assume all components are ideal.

11/21/21 MIT MANIPAL 185


11/21/21 MIT MANIPAL 186
11/21/21 MIT MANIPAL 187
7) A Forward converter is operating in continuous conduction mode has the
following specifications: Vg = 48 V, D = 0.4, N1/N2 = 1.2, N1/N3 = 1. Determine
the voltage across the primary, secondary and tertiary windings of the
transformer during the switch on condition. Hence, calculate the output voltage

11/21/21 MIT MANIPAL 188


11/21/21 MIT MANIPAL 189
11/21/21 MIT MANIPAL 190
8) A Forward converter is operating in continuous conduction mode has the
following specifications: Vg = 100V, D = 0.35, N1/N2 = N1/N3 = 1. magnetizing
inductance is 1mH and filter inductance is 70µH and load resistance is 20Ω
C= 33µF the switching frequency is 150Khz. Determine output voltage and
peak current lm in the transformer.

11/21/21 MIT MANIPAL 191


11/21/21 MIT MANIPAL 192
11/21/21 MIT MANIPAL 193
Applications

1. Television
2. Aeronautics
3. Telecommunications
4. Converters and Inverters
5. Industrial Equipment

DC-DC power supplies


• AC-DC power supplies
• High voltage power supplies
• Battery charging
• Solar microinverters
• LED lighting
• Telecommunications

11/21/21 MIT MANIPAL 194


Achieving a Buck-Boost converter with galvanic isolation (II)

D - -
S RL vO
vg L C + +
n1:n2
Two-winding
inductor ig

+
n1:n2 D S on, D off, vL
during dT vg L1 -
+ +
L1 L2 RL vO
C - - Charging stage
iO
vg
+
C - -
S vLn2/n1 vO
RL
S off, D on, - L2 + +
during (1-d)T
Final implementation: the Discharging stage
Flyback converter
11/21/21 MIT MANIPAL 195
Achieving other converters with galvanic isolation (I)
L1 C1 n1:n2
L D RL + -
+ + D
vO vg L2 + RL
vg S C - - vO
Boost C2 -
S
SEPIC
It is not possible with
only one transistor!!

L1 C1 n1:n2 C2 L2  Zeta converter is also


+ - + - possible
Vg RL
-  vO = vg(n2/n1)d/(1-d)
VO
D C3 +
S
 vSmax = vg + vOn1/n2
Cuk
 vDmax = vgn2/n1 + vO

Like the Flyback converter


11/21/21 MIT MANIPAL 196
Achieving other converters with galvanic isolation (II)
Other converters from the Buck family
but for higher power level

vg vSmax = 2vg iS_avg = PO/(2vg)


Push-Pull High voltage across the transistors and moderate
current  for low input voltage

vSmax = vg iS_avg = PO/vg


vg Lower voltage across the transistors but higher
Half-Bridge
current  for high input voltage

vSmax = vg iS_avg = PO/(2vg)


Lower voltage across the transistors and
vg moderate current  for high power
Full-Bridge

11/21/21 MIT MANIPAL 197


11/21/21 MIT MANIPAL 198
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11/21/21 MIT MANIPAL 200
11/21/21 MIT MANIPAL 201
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11/21/21 MIT MANIPAL 205
11/21/21 MIT MANIPAL 206
11/21/21 MIT MANIPAL 207
11/21/21 MIT MANIPAL 208
11/21/21 MIT MANIPAL 209
11/21/21 MIT MANIPAL 210
11/21/21 MIT MANIPAL 211
11/21/21 MIT MANIPAL 212
The current-fed converter has an input inductor Lx that is large enough to assume
that the source current is essentially constant. The source voltage is 30 V, and the
load resistor is 6 . The duty ratio of each switch is 0.7, and the transformer has a turns
ratio of NP /NS 2. Determine (a) the output voltage, (b) the current in Lx, and (c) the
maximum voltage across each switch.

11/21/21 MIT MANIPAL 213


Two-winding magnetic devices for DC/DC converters (I)
Transformer leakage inductance must be minimized. Otherwise,
voltage spikes increase the voltage stress across semiconductor
devices in many converters
n2 n1 n2/3 2n1/3 2n2/3 n1/3

without interleaving with interleaving


(high leakage) (low leakage)
11/21/21 MIT MANIPAL 214
Two-winding magnetic devices for DC/DC converters (II)
n2 n1 n2/3 2n1/3 2n2/3 n1/3

A H2 H(x)2
H(x)2
x

AH2 These areas are proportional to


x the leakage inductance
11/21/21 MIT MANIPAL 215
The control circuitry in DC/DC converters (I)
The heart of the control circuitry is the Pulse-Wide Modulator PWM

VP

PWM vd VPV
Ramp VV
generator vgs
(oscillator)

-
tC
+ + +
vd vgs TS
- - vd - VV
d=
VPV

11/21/21 MIT MANIPAL 216


The control circuitry in DC/DC converters (II)
• Standard ICs to control DC/DC converters also include:
- Error amplifier
- Comparators for alarms
- Some logic circuitry
Ramp - Driver
generator
- Linear regulator
(oscillator)

- Logic
-
Av
circuitry +
+
+ + vgs
vd - Driver
-
- +

Reg V -
+
11/21/21 MIT MANIPAL 217
The control circuitry in DC/DC converters (III)

Ramp Power
generator
vg stage RL vO
(oscillator)

- L og ic
-
Av
c irc uitry +
+ Driver
+ + vgs
vd - Driver
- +
-
vd
PWM Av -
Reg V -
+
Output-voltage Vref
feedback loop

A dynamic model of the power stage must be known to calculate


the compensator AV and, therefore, to be able of properly
closing the feedback loop

11/21/21 MIT MANIPAL 218


The control circuitry in DC/DC converters (IV)
Dynamic modelling

 Dynamic modelling of the power stage of DC/DC converters is a


complex task

 Linear models can be obtained using average techniques and


linearizing the equations obtained (small-signal modelling)

 Small-signal average linear models loss information about


voltage and current ripple

 Small-signal average linear models are only valid for frequencies


well-below switching frequency (average models)

 Small-signal average linear models lead to canonical circuits to


study the converter behaviour (in CCM and DCM)

11/21/21 MIT MANIPAL 219


Inductors
An inductor is a passive two-terminal electrical
component that stores energy in its magnetic field.
An inductor is typically made of a wire or other conductor
wound into a coil, to increase the magnetic field.
When the current flowing through an inductor changes,
creating a time-varying magnetic field inside the coil, a voltage
is induced, according to Faraday's law of electromagnetic
induction
 Inductors are one of the basic components used in electronics
where current and voltage change with time, due to the ability
of inductors to delay and reshape alternating currents.

220
Inductors

Inductor symbols

221
FARADAY’S LAW OF
ELECTROMAGNETIC INDUCTION
If a conductor is moved through a The greater the number of flux lines cut per
magnetic field so that it cuts unit Time or the stronger the magnetic field
magnetic lines of flux, a voltage will strength, the greater will be the induced
be induced across the conductor voltage across the conductor.

Equation for voltage induced across a Increase the number of magnetic flux lines
coil if a coil of N turns is placed in the by increasing the speed with which the
region of a changing flux conductor passes through the field

222
Faraday’s law induced voltage equation
N = number of turns of the coil

= is the instantaneous change in flux (in webers)

If the flux linking the coil ceases to change

&

Equation for inductance of the coils


N = number of turns µ is not a constant but
µ = permeability of the core depends on the level of B
A = area of the core and H, since µ = B/H
in square meters
l = the mean length of the core in meters.

223
Substituting µ = µr µo into Equation we get

Lo is the inductance of the coil with an air core

224
Example 11.1

For the air-core coil


a)Find the inductance

225
Example 11.1 cont’

b) Find the inductance if a metallic core with µr = 2000 is


inserted in the coil

226
11/21/21 MIT MANIPAL 227
11/21/21 MIT MANIPAL 228
11/21/21 MIT MANIPAL 229
11/21/21 MIT MANIPAL 230
11/21/21 MIT MANIPAL 231
11/21/21 MIT MANIPAL 232
Filter Inductor Design

Filter Inductor Design Constrain


The Core geometrical Constant Kg
A Step-by Step design Procedure
Summary of Key Points

11/21/21 MIT MANIPAL 233


Area Product No of turns

KwAw =N.a
Gauge of wire
Cross section are of the wire can be calculated

KwAw J Kc = N.Im
Air gaop lg

L I m = N Ac B m

11/21/21 MIT MANIPAL 234


Magnetics Design
Dr. Saikrishna Goud
Assistant Professor
Dept. of E & E, MIT Manipal

Sunday, November 21, 2021 DEPT. OF ELECTRICAL & ELECTRONICS ENGG., MIT - MANIPAL 235
Introduction
Buck
Boost
Buck-Boost
Flyback, Forward, Push-Pull
Cuk
Sepic
Resonant Converters (SLR, PLR)

Energy Transfer Element is Inductor/Transformer

Sunday, November 21, 2021 DEPT. OF ELECTRICAL & ELECTRONICS ENGG., MIT - MANIPAL 236 236
Basics
 Permeability (μ)

 Reluctance (S)

Essential Characteristics of the Magnetic Core

 Low Cost

 Low Losses

 High Saturation Flux Density

 Temp. Linearity

Sunday, November 21, 2021 DEPT. OF ELECTRICAL & ELECTRONICS ENGG., MIT - MANIPAL 237 237
Types of Cores

Iron Core Ferrite Core


Flux density is more (1-1.5T) Flux density is less (0.2-0.4T)
Hysteresis loss is more Hysteresis loss is more
Core conductivity is more Core conductivity is more
Eddy current loss is more Eddy current loss is less
Operating frequency range is Higher operating frequency
in Hz to few kHz.

Sunday, November 21, 2021 DEPT. OF ELECTRICAL & ELECTRONICS ENGG., MIT - MANIPAL 238 238
Principles of Inductor design

Number of Turns= N
Current flowing in the coil= I Amps
Mean magnetic length of core=lc
Mean length of Airgap= lg
Cross sectional area of core=Ac
Cross sectional area of air gap =Ag

lc lc
S S
o r AC o r Ac

NI   ( SC  S g ) To produce L henries of
inductance required number
of turns need to be
calculated
Sunday, November 21, 2021 DEPT. OF ELECTRICAL & ELECTRONICS ENGG., MIT - MANIPAL 239 239
Types of Ferrite Cores

Sunday, November 21, 2021 DEPT. OF ELECTRICAL & ELECTRONICS ENGG., MIT - MANIPAL 240 240
Cont…

Sunday, November 21, 2021 DEPT. OF ELECTRICAL & ELECTRONICS ENGG., MIT - MANIPAL 241 241
Cont…
Parameters that needs to be calculated for the Inductor design
 Window factor
 Area product
 Energy that can be handled by the Inductor
 Number of turns required

Sunday, November 21, 2021 DEPT. OF ELECTRICAL & ELECTRONICS ENGG., MIT - MANIPAL 242 242
Window factor/ Area Product
Assume the area of cross-section of the wire is ‘a’cm2.

N  a of turns required= N turns


Number
kw 
AW
NI
kw 
AW  J
Im
Crest factor (kc ) 
I ( RMS )
NI m  k w Aw Ac J

Sunday, November 21, 2021 DEPT. OF ELECTRICAL & ELECTRONICS ENGG., MIT - MANIPAL 243 243
Cont…

di d
eL N
dt dt
e  LI m  NAC Bm
Energy that can be handled by inductor is
1 2
E  LI
2
1
E NAc Bm I m
2
Calculate Area Product (Ap)
2E
Ap  AW Ac 
K w Ac JBm

Sunday, November 21, 2021 DEPT. OF ELECTRICAL & ELECTRONICS ENGG., MIT - MANIPAL 244 244
No. of Turns Required
Number of turns required are,

LI m
N
Ac Bm

Sunday, November 21, 2021 DEPT. OF ELECTRICAL & ELECTRONICS ENGG., MIT - MANIPAL 245 245
Core Mean Core cross- Window area Area Product AL
length section (Aw*100mm2) (Ap*10^4
(mm) (Ac*100mm2) mm2)

Core selector chart


EE20/10/5 38 0.31 0.478 0.149 1624
EE25/9/6 51.2 0.40 0.78 0.312 1895
EE25/13/7 52 0.55 0.87 0.478 2285
EE30/15/7 56 0.597 1.19 0.71
EE36/18/1 70.6 1.31 1.41 1.847 4200
1

EE42/21/9 77.6 1.07 2.56 2.739 2613


EE42/21/1 93 1.82 2.56 4.659 4778
5

EE42/21/2 99 2.35 2.56 6.016 6231


0

EE65/32/1 150 2.66 5.37 14.284 4833


3

Sunday, November 21, 2021 DEPT. OF ELECTRICAL & ELECTRONICS ENGG., MIT - MANIPAL 246 246
Sunday, November 21, 2021 DEPT. OF ELECTRICAL & ELECTRONICS ENGG., MIT - MANIPAL 247 247
Small-signal average models for DC/DC converters in CCM
^
e(s)·d Leq  Quantities with hats are
perturbations
1:N +  Quantities in capitals are
^v ^ ^v steady-state values
g j·d C RL - O
 “s” is Laplace variable

VO VO
Buck: e(s) = 2 j= Leq = L N=D
D RL
Leq VO L 1
Boost: e(s) = VO(1- s) j= Leq = N=
RL RL (1-D) 2
(1-D)2 1-D

Buck-Boost (VO<0) :
-VO DLeq -VO L -D
e(s) = 2 (1- s) j= Leq = N=
D RL RL(1-D) 2
(1-D)2 1-D
11/21/21 MIT MANIPAL 248

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