Professional Documents
Culture Documents
FPGA Based System Design: Engr. Rashid Farid Chishti Lecturer, Dee, Fet, Iiui Chishti@Iiu - Edu.Pk Week 9
FPGA Based System Design: Engr. Rashid Farid Chishti Lecturer, Dee, Fet, Iiui Chishti@Iiu - Edu.Pk Week 9
WEEK 9
BEHAVIORAL MODELING
MOORE MACHINE
module test_Moore_Circuit;
reg x, CLK, RST; // inputs for circuit
wire [1:0] AB; // output from circuit
Moore_mdl mm1 (x, AB, CLK, RST);
initial begin CLK = 0;
repeat (14) #5 CLK = ~CLK;
end
initial begin x = 0;
repeat (7) #10 x = ~ x;
end
initial begin RST = 1; #3
RST = 0; #3
RST = 1;
end
endmodule
www.iiu.edu.pk 4 Saturday, November 27, 2021
Examples
Moore Machine