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Vel Tech: 1150EC101 - Basic Electronics Engineering
Vel Tech: 1150EC101 - Basic Electronics Engineering
Rangarajan Dr.Sagunthala
R & D Institute of Science and Technology
(Deemed to be University Estd u/s 3 of UGC Act, 1956)
o G – Heavily doped
o S & D – Lightly doped
n-channel
Construction Symbol
Continued…
p-channel
Construction Symbol
Working of n-channel JFET
(i) VGS = 0 & VDS is positive
(ii) VGS < 0 & VDS is positive
(iii) VGS > 0 & VDS is positive
(i) VGS = 0 & Varying VDS (VDD)
- No variation in the width of
depletion region.
- Drain current (ID) increases as
VDS increases
-
(ii) VGS < 0 & Varying VDS (VDD)
- width of depletion region increases as VGS increases. (reverse biased)
- Drain current (ID) decreases as VDS increases with increase in VGS since channel width
decreases.
- at VGS=VP , depletion regions touches each other, blocks the current flow though channel,
hence ID becomes zero. (no conductive path)
- switched OFF.
- to switch OFF an n-channel device requires a negative gate-source voltage (VGS). Conversely,
to switch OFF a p-channel device requires positive VGS.
- where VP Pinch off voltage
Saturation region