Welcome

WorldFIP CERN site :

http://wwwlhc.cern.ch/IAS/Frames/WS_Frames.html
WorldFIP Organization site :
http://www.worldfip.org
JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 1
 JCOP Meeting (11/07/2001)
Overview

 WorldFIP Protocol

 WorldFIP Technology

 TCP/IP Communication

 Current/Future Developments

 Conclusions

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 2
 One Bus for 3 Levels of Control

Control and / or Programming

supervision

Supervision Level
WorldFIP (1Mb/s or 2.5
Mb/s)
Control Level

M M

DWF DWF DWF

M M M
M M
Process Level
DWF
M DWF

WorldFIP WorldFIP WorldFIP

31.25 kb/s or 1 1 Mb/s 1 Mb/s or 2.5 Mb/s
Mb/s process manufac drive systems
systems turing
systems
JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 3
 Data Types

 Cyclic variables : always transmitted, for time-critical closed loop

control

 Event variables : transmitted on demand or change of state, eg

for alarms or display

 Messages : non-time critical, eg for maintenance, configuration

and diagnostics

Think of the WorldFIP bus as a “data pipe”

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 4
 3 Data Types
In the Same Pipe

We need message transfers for :

Configuration & Maintenance.

Events transfers for :

Alarms.

And Real Time transfers for :

Control & Monitoring

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 5
 Various Applications

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 6
 PEER to PEER Concept
 Peer-to-peer communication
Not master-slave

 Access controlled by Bus Arbiter (BA) « link active

scheduler »
Multiple redundant bus arbiters possible

 Producer-consumer model of communication

One-to-one
One-to-many
One-to-all
(Broadcast)

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 7
 Producer-Consumer Model

 At any one time, one node produces data:

Any or all of the other nodes may consume the data

C C
P
 Cyclic data is guaranteed to be on
time

WorldFIP...simpler system designs

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 8
 The method of
communication

Equipment 1 Equipment 2 Equipment 3

PRODUCER CONSUMER

Network Scheduler

WorldFIP fieldbus
BUS ARBITRATOR
( DISTRIBUTOR )

CONSUMER CONSUMER

Equipment 5 Equipment 4

BA TABLE
(scanning table)

 Each Application Variable is produced by one and only one PRODUCER and can be
consumed by one or several CONSUMER(s)

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 9
 The method of

communication
 Transmission of the QUESTION associated to an Application Variable and recognition by the producer and consumers

Equipment 1 Equipment 2 Equipment 3 Equipment 4 Equipment 5

P C C C
Bus Arbitrator

BA Question

 Production and Comsumption of the ANSWER associated with the previous Question

Equipment 1

P Equipment 2 Equipment 3 Equipment 4 Equipment 5

Answer C C C
Bus Arbitrator

BA

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 10
 Elementary WorldFIP Transaction

an elementary WorldFIP transaction

TR
Question Answer
ID_DAT RP_DA
T
1
Can you send on the network the value of
the information «temperature» ?

2
We wait for the answer

3
Here is the value of the information
«temperature».

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 11
 Frames
Periodic
Variable
 Frames = WorldFIP Variable
Transfer

☞ DATA BASE OBJECT IDENTIFIER

SOF ID_DAT Identifier CRC EOF

2 bytes 1 byte 2 bytes 2 bytes 1 byte

☞ BUFFER CONTENTS FRAME

SOF RP_DAT Buffer Contents CRC EOF

2 bytes 1 byte 1 to 128 BYTES 2 bytes 1 byte

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 12
 Turnaround & Silence Time

 TR : Turnaround time ( When the producer answer to the request )

WorldFIP transaction

TR
Question Answer
ID_DAT RP_DA
T

 TSilence : Silence time ( When there is no answer from the producer )

WorldFIP transaction

TSilence
Question next Question

ID_DAT ID_DAT

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 13
 The method of

 on a WorldFIP network , you can have one or several Bus Arbitrator ...
communication
station address

Equipment 1

Equipment 2 Equipment 3
(BA)
- priority 0 -
(BA)
- priority 1 - CONSUMER
PRODUCER

WorldFIP fieldbus

(BA) CONSUMER
- priority 2 -

Equipment 4
CONSUMER
Equipement 5

The equipment with the smallest station address and with the smallest priotiy will be the active BA. The others will be potential BAs

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 14
 WorldFIP Cycle
20ms Macrocyle
Synchro
Start (Every
20 mS)
Dead

Band
V1

M3
Periodic
V2
Variables

M2

20 ms
IT Message V3

M1

E1

E2

Aperiodic Variables
JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 15
 WorldFIP Cycle
A Macrocyle with 4 elemantary cycles
 Application with 3 process Variables 0
Periodic Traffic

S
 Variable S : Every 5ms P
T
Set Courant (array of Integers)
Aperiodic
Traffic

Variable P : Every 10ms Pressure

Value (array of Integers) S
15 mS 5 mS
S

Variable T : Every 20ms Temperature

Value (array of Integers)

P
S

10 mS

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 16
 Elementary Cycle
Spacial Representation

 The BA table (scanning table)

T.e.c.(ms)

APERIODIC WINDOWs
for MESSAGES
or STUFFING

APERIODIC WINDOWs
for VARIABLES
or STUFFING

T T T
P P
PERIODIC TRAFFIC
S
P S S S S S S S S
P P
T(ms)
5 ms
ELEMENTARY CYCLE
10 ms

20 ms

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 17
 Macro Cycle
Spacial
Representation

APERIODIC WINDOWs
for MESSAGES
or STUFFING

APERIODIC WINDOWs
for VARIABLES
or STUFFING
T T T
P P
PERIODIC TRAFFIC
S
P S S S S
P S S S S
P
5 ms
MACRO CYCLE
10 ms

20 ms

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 18
 Physical Layer
Electrical Encoding
& Frame Format
 Manchester biphase
coding
T/2 - T/2 - T/2 T/2
- T/2 T/2 -
T/2 T/2

" Logical 1 " " Logical 0 " " N+ " N- "

"

 WorldFIP Frame format (IEC 1158-2)

CAD
1 0 1 0 1 0 1 0 1 V+ V- 1 0 V- V+ 0 1 V+ V- V+ V- 1 0 1

PRE FSD FED

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 19
 Physical Layer
Main
characteristics
 Maximum length with a copper line
@ 31.25 kbps : 5 km - 20km
@ 1 Mbps : 1km - 4 km
@ 2.5 Mbps : 500 m - 1.5 km
@ 5 Mbps : 300 m - 700m
@ 25 Mbps : 80 m - 200m

 Maximum length with a fiber optic

@ 31.25 kbps,1 Mbps, 2.5 Mbps, 5 Mbps, 25 Mbps : 40 km

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 20
 Physical Layer
Bus Topology

 ELECTRICAL MEDIUM

Up to 256 Subscribers
max. 32 Subscribers
R R R
S •• S S •• S S •• S S •• S
L max. = 1 km
L max. = 4 km

 OPTICAL MEDIUM

S
Up to 256 Subscribers S S

S A.S. A.S. A.S. S

S : Subscriber L max. = 1 km L max. = 1,6 km S
R : Repeater
A.S. : Active L max. = 7 km
Star

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 21
 Physical Layer
Bus Topology With
Medium
Redundancy
Optical subscribers
S S S

Optical segment

Optical trunks R R

A.S. R R
Copper subscribers Copper subscribers
S S S S

Copper trunk Copper trunk

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 22
 Application Layer
Periodic Functionalities

READ/WRITE OF THE CONSUMED/PRODUCED VARIABLES

 ELABORATION OF TIME QUALIFIERS (Critical Time flags)

☞ PROMPTNESS

☞ FRESHNESS

 GENERATION OF SYNCHRONISATION EVENTS

⮊ TRANSMISSION

⮊ RECEPTION

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 23
 WorldFIP technology
FULLFIP2 - Communication
Controller -
⮊ Implements services from:
WRERSnET

VreSsSer

TSTn[2]
TSTn[0]
TSTn[1]
MA[6]
MA[7]
Application, Data Link
RTSK
EMAn

MA[5]

MA[3]
MA[8]

MA[4]

MA[2]
MA[1]
VDD
VDD
ALE
RDn

ved
n

PA[19] MA[0]
and Physical layers
PA[18] BUSY
PA[17] EOC

⮊
PA[16] DTACKn
Supports Bus Arbitrator and
VLSI
PAD[15] IRQn
PAD[14] VSS
PAD[13]
PAD[12]
PAD[1
UA[2]
UA[1]
UA[0]
Subscriber services
1] VSS
PAD[10]
9348BS 452531 UDAT[7]

⮊
PAD[9]

Up to 4000 Identifiers
UDAT[6]
VD
D
VDD
VY06482-2 UDAT[5]

FULLFIP2
UDAT[4]
PAD[8]
VSS UDAT[3]
VSS
BRQn
WorldFIP UDAT[2] ⮊ Speeds : 31.25kb/s, 1Mb/s, 2.5Mb/s,
BGNTn
PAD[7] UDAT[1] 5Mb/s & 25Mb/s
PAD[6]
PAD[5] UDAT[0]
reserved (old DSn)
TEN2

TXER2

VDD
TXCK
TEN1

MC K
VDD
CKIN
RTS
PAD[4]

PAD[2]
PAD[1]

TXER1

RXD
TXD
PAD[3]

PAD[0]

CTS

VSS

EXCTD

⮊
CSn

Compliant with the

CnK

RW n

standards :
EN50170-3 & IEC-1158-2

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 24
 WorldFIP technology
FULLFIP2 - Chip

⮊ FULLFIP2 Architecture (mono-medium)

TSTn[0]
RESETn

TSTn[2]

TSTn[1]

MA[5]
TSTCK

MA[4]
MA[3]
MA[2]
MA[1]
EMAn

Micro
MA[8]
MA[7]
MA[6]

VDD
VDD
ALE

VSS
Wrn

RTsk

E/S
Rdn

ROM RAM
Processeur
PA[19] MA[0]
PA[18] BUSY
PA[17] EOC
PA[16] DTACKn
PAD[15]
PAD[14] VLSI IRQn
VSS
Bus Système
PAD[13] UA[2]
PAD[12] UA[1]
PAD[11] UA[0]
PAD[10] VSS RAM
PAD[9] 9348BS 453562 UDAT[7] privée
V FULLFIP2
DD
VDD VY06482-2 UDAT[6]

PAD[8] UDAT[5]
VSS FULLFIP2
VSS UDAT[4]
BRqn
BGtn
WORLDFIP UDAT[3]

PAD[7] UDAT[2]
PAD[6]
PAD[5] UDAT[1]

UDAT[0]
FIELDRIVE
ExtCk
CTS
TxEn2

CDn
CKin
MCk
RTS
TxD

TxEr1
TxEn1

RxD
PAD[4]

DSn
TxEr2
PAD[0]

VSS
PAD[3]
PAD[2]
PAD[1]

VD

VDD
D
TxCk

CSn
R/Wn

FIELDTR

WorldFIP Bus

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 25
 WorldFIP technology
FULLFIP2 - Network Control Chip

⮊ FULLFIP2 with a bi-medium architecture

Micro
ROM RAM E/S
Processeur

Bus Système
RESETn

RAZ1n
TXER

RAM
WD1n
CD1n
VDD
WRn

CLK
RDn

VDD
CSn

privée
1

A0 n.c. FULLFIP2
Q0
WDMn A1 MHS Q1
D0 SCD1
MCSL-2KFBV-9 SCD2
D1 CLR1
FIELDUAL
CLR2
D2 VALTEN1
VALTEN2
FIELDUAL
D3 WDGn
TEST
D4

D5
GND
GND

CLK2
PAD0

FIELDRIVE FIELDRIVE
CSVM

WD2n
TEN1

CD2n

CDn
TXER2
RD
VMn

RAZ2n

n.c.

FIELDTR FIELDTR

WorldFIP Bus 1

WorldFIP Bus 2
JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 26
 WorldFIP technology
FIP Medium Redundancy

Micro
 Solution
ROM RAM E/S
Processeur
 Transmission on both mediums
 Reception selected from the first and the best one
Bus Système

RAM
privée
FULLFIP2
 Transmission error management
 Stop transmission upon a medium failure
 No full stop transmission on both mediums

FIELDUAL
 Reception error management
 Error statistics elaboration
FIELDRIVE FIELDRIVE
 Disabling medium with error

FIELDTR FIELDTR  Fault detection

 Selective transmission by BA
WorldFIP Bus 1
WorldFIP Bus 2  Verify transmission using loop-back mechanism

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 27
 WorldFIP technology
FIELDUAL chip - Medium
Redundancy Control

 PLCC 44
RESETn

TXER1

RAZ1n
WD1n
CLK1

CD1n

 Automatic selection of the reception

RDn
WRn

VDD

VDD
CSn

A0 n.c.
channel
MHS
A1 Q0
WDMn Q1

D0
MCSL-2KFBV-9
SCD1  Providing of the selected
reception channel number
D1 SCD2

D2 FIELDUAL CLR1

D3 CLR2

D4
VALTEN1
 Disabling of one or both channels
D5
VALTEN2
under the control of the
CDn

n.c.
WDGn

TEST
microprocessor
 Providing of channels states
GND

GND

CLK2
TEN1
PAD0

CD2n
WD2n
CSVM

RAZ2n
TXER2
RDVMn

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 28
 WorldFIP technology
FIELDRIVE - Line Driver
⮊ ASIC mixing analogue and
digital technologies
CKER
TXER

TXCK

TXD

TS0

TS1
RXD

⮊ PLCC28 packaging
28
4

26
27

CDN 5
⮊ Compliant with EN50170-3 and IEC 1158-2
standards:
25 VEED

VCCD 6 FIELDRIVE 24 RXA

WDGN 7 23 FLIN

TXENA 8 22 FLOUT ☞ 3 speeds selected with external passive

9
National VEEA elements : 31.25 Kb/s, 1Mb/s, 2.5 Mb/s
21
10
Semiconductor 20
VREF PRERXIN

VCCA 11 19 RXIN ☞ Shielded twisted pair

☞ Voltage-mode coupling
12

15

16
14

18
13

17
D
DN

RSENS

DL

DH
DHN

DLN

⮊ Supply voltage : 5V

⮊ Temperature range: - 40°C to +

JCOP Meeting 11/07/2001 85°C (R. BRUN & R RAUSCH)
WorldFIP Protocol & Technology 29
 WorldFIP technology
FIELDTR - Line Isolation Transformer -
⮊ Transformer to be used with FIELDRIVE
FIELDTR

⮊ A dedicated one for each

10 speed:
mm ☞ FIELDTR31.25, FIELDTR1, FIELDTR2.5
FIELDTR25

⮊ High level insolation > 1500 V

8 4
⮊ Operating temperature range:
R 5 2
D
☞ -40°C to +85°C

Rn 3 6
Dn ⮊ Transformer ratio:
1 7
☞ 1 (31.25 kbps), 1.57 (1 Mbps and 2.5 Mbps)
Network side Subscriber side
(primary) (secondary)
⮊ RM6 magnetic core
JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 30
 WorldFIP technology
MICROFIP - Simple
Communication Controller
Micro ROM RAM
Contrôleur optionnelle optionnelle
Entrées
MICROFIP

Bus Système
Sorties

SUBS[6]
SUBS[5]
SUBS[4]
SUBS[3]
SUBS[2]
SUBS[1]
SUBS[0]
SUBS[7

PIA[6]

PIA[1]
PIA[0]
PIA[5]

TER1X
PIA[2]
PIA[7]

PIA[4]
PIA[3]

TXCK
RXA1

WTC1
TXE1
INVA
CPIA

VDD
VDD
VSS

CTS
VSS

RTS

TX
X
D

X
]
AD[0]
AD[1]
RXD1
RST1N MICROFIP
AD[2] Entrées
VLSI
RXA2X
AD[3] TXE2
AD[4] TER2X
AD[5] WTC2X
AD[6] RXD2
AD[7] RST2N
A[0] PIB[7]
RAM 248 octets Sorties
FIELDRIVE FIELDRIVE Optionnel VDD 9xxx B72215.U2 VSS
VDD
VSS VSS
A[1]
A[ VY27190 PIB[6]
PIB[5]
ou ou CREOL 2] PIB[4]
A[
3] MICROFIP PIB[3]
PIB[2]
A[ PIB[1]
CREOL 4] PIB[0]
A[ INVB
5]
A[

XT1
VDD

VDD
CLK
SLONE

RSTIN
EXSL0

[1]
6]

DEFSUP

TST
D TST[0]
CK

VD
SCAMO
EORDn

MOD[1
1 VSS

VSS

TST[2
0

MOD[0]
EXSL
EXSL
ALE

RES1
RES2
RES3

CPI
SELAC
SELDE
RW

IRQ0N
A[

0
N

B
M

T ]
7]

2
A[8]
FIELDRIVE FIELDRIVE O ptionnel

]
CSN

ou ou
CREOL CREOL

FIELDTR ou Optionnel
FIELDTR ou
TransfoFC1007 TransfoFC1007

FIELDTR ou FIELDTR ou Optionnel

TransfoFC1007 TransfoFC1007
WorldFIP Bus 1
WorldFIP Bus 2

WorldFIP Bus 1

Stand-Alone Mode Micro-Controlled

Mode

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 31
 WorldFIP technology
MICROFIP - Communication
Controler
 Low cost and easy to use ASIC solution to design high
integration WorldFIP field devices

 Two parallel input/output 8 bits ports

 A dedicated input 8 bits port to sense the station number

 Supply voltage 3,3 or 5 volts

 Packaged in the MQFP100 standard solution

 Speeds : 31,25 kbits/s, 1 and 2,5 Mbits/s

 Support built-in medium redundancy

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 32
 WorldFIP technolgy
MICROFIP - Main Characteristics
 A subset of WorldFIP normalized services
 No bus arbitrator functions
 Selectable frame delimiters and control sequence (IEC)

 15 Blocks of 8 bytes available for variables

 REFRESHNESS and PROMPTNESS statuses for MPS variables(periodic)

 PRESENCE and IDENTIFICATION variables

 Transmit/Receive messaging channel of a 128 Bytes maximum width (only used with a micro
controller)
 Messages handled in acknowledged or non acknowledged mode

 Interrupt mechanism (only used with a micro controller)

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 33
 Ethernet & WorldFIP

TCP/IP & new WorldFIP

Technologies :
The way toward
Fieldbuses & Internet

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 34
 New Component
FIP25 - Chip Set

WorldFIP (Factory Fieldbus Internet Protocol

✓ 31,25 kbit/s to 25
Information Protocol) ✓ Mbit /s Redundant
31,25 kbit /s to 2,5 ✓ medium Deterministic
▼
Mbit /s ✓ traffic Aperiodic traffic
▼ Redundant medium
✓ Bus arbiter
▼ Deterministic traffic
✓ IP Messages
▼ Aperiodic traffic
✓ TCP / UDP
▼ Centralised bus arbiter ✓ Embedded WEB server
✓ Multimedia possible

FULLFIP 2
MicroFIP
VLSI
FULLFIP 3 Fieldrive 25 Field TR 25
TECHNOLOGY

VLSI
9348BS 452531
VY06482-2 9616 B72215-U2
FULLFIP2 VY27190-
Silicon TR25
WORLDFIP MICROFIP
Fo under Drive25 14423P
9348BS
VY06482-2 Silicon
S93/47
Fieldual Fieldrive Field TR FIPHSF
Founder

FIELDRIVE FIELD TR1

FIELDUAL National 14423P

Very easy tto use

Semiconductor
S93/47

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 35
 Ethernet / WorldFIP Architecture
Maintenance
Configuration
Diagnostics
Etherne

Gateway t
Ethernet/WorldFIP
Message

Monitoring
Control PC WINDOWS

Real Time data

We can now make an efficient

Ethernet/WorldFIP architecture !
JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 36
 G96 Ethernet / WorldFIP Gateway
(MII Supplier)

Developpment PC
with HAWK

MB-ETH-WF Router
PC WINDOWS Ethernet/WorldFIP

Ethernet

G96 Ethernet / WorldFIP Gateway

WorldFIP

Stack TCP/ip
WorldFIP
Routage
(Telnet, FTP
Ping...etc)

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 37
 Ethernet / 8 WorldFIP Gateway
(MII Supplier)
developpment PC
with HAWK

Routeur MB-ETH-WF
Ethernet/WorldFIP

ETHERNET

Ethernet / 8 WorldFIP Gateway

WorldFIP-8

WorldFIP-1

Stack TCP/ip
WorldFIP
Routage
(Telnet, FTP
Ping...etc)

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 38
 News

Current & new Developments

with WorldFIP

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 39
 GESPAC C51/WorldFIP
Interface & Process Module

Partnership
GESPAC/CERN

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 40
 GESPAC C51/WorldFIP
Interface & Process Module

APPLICATION MODULE

CONNECTOR
CPU : 80C51

APPLICATION
OUTPUT SIGNAL


(to safety)

APPLICATION MEZZANINE
INPUT SIGNAL
(from sensor)
INPUT OUTPUT

Fieldbus : MICROFIP
CONTROL
ANALOG ANALOG

 4 32

 RAM : 64Kb MEZZANINE CONNECTOR

(64 Pin)

 Flash EPROM 64b

TEMPERATUR DATA
E SENSOR DAC MPX ADC
LATCH

5 V / +/- 12 V
SUPPLY
Analog I/O 12BIT) :
DATA


DATA ADDRESS
PLUG CONTROL BUS

SUPPLY

• Input : 32
FLASH
CLOCK SRAM MICRO-
FPGA MEMORY RESET
CALENDAR 64K CONTROLER
64K
80C51 I2C

channels (ADC &

BASE MODULE
SUPPLY
MONITOR and

MPX)
WATCHDOG

FIP CONNEC OR 5V
9-pin SUB-D m ale +/-12V

• Output : 2
FIELDTR DC/DC

FIP 1
MICROFIP
CONVERTER
FIELD
(x2)
DRIVE

channels (DAC) FIP 2

FIELDTR

 Digital :I/O Bus

FIELD
FILTER
DRIVE

 Watchdog
SERIAL PORT
RS232
I2C
and

I2C BUS
SUPPLY CONNECTOR
8.5 TO 36 v

SERIAL
CO N N E CTO R
9-pin SUB-D
female

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 41
 Schneider’s new Architecture
Ethernet/WorldFIP Module
Supervision
Configuration Opération SNTP Server

AlspaVNTC/WNTC
CEGELE

(GPS Time)

Ethernet Ethernet

BUS_X Ethernet
CPU
PREMIUM Top-Synchro From IRIG-B Module
(Optional Input) (10,20,50,100,200,500ms...)

WorldFIP (31.25 Kb/s, 1 & 2.5 Mb/s)

Agent (1) Agent (2) ..... Agent (n)

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 42
 Schneider’s New Architecture
Ethernet/WorldFIP Module
WorldFIP
Configuration
P r o g r a m m a t i o n (PL7)

 Main Functions : S u p er v i s i o n ( P C V U E 32)

Diagnostic
Ethernet

Gateway between PREMIUM

application (Bus-X ) & PLC Premium

WorldFIP fieldbus
WorldFIP/Ethernet

Router between Ethernet

Module WorldF IP
Analyser

and WorldFIP (TCP/IP Wor ldFIP (31.25Kb/s or 1Mb/s, 2.5 Mb/s)

protocol) device (Ping,

TELNET, FTP...)
(Optional)

FIPIU FULLFIP MICROF IP FULLFIP

WorldFIP/
CERN Fieldbus Foundati on
Application Bridge

 Device Synchronization Microbox

Fieldbus Fondation (31.25 KHz

Momemtum

and timestamping (resolution:1ms) (CABTF2)

Intelligent

from IRIG-B or SNTP time

A c t u a t o rs / S e n s o rs

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 43
 IOLINKFIP
Micro-card
(“Mezzanine”
IOLINKFIP is )
I/O Connectors I/O Connectors
dedicated to
radiation
applications IOLINKFIP

IOLINKFIP is (FPGA)
integrated in the
FPGA Transfo
Actel (anti-fuse
technology) Configuration
Links

FIP Address

WFIP Connector Address Switchs

 Note : Needs evaluation phase

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 44
 IOLINKFIP
Direct Mode
CONFIGURATION APPLICATION

CONTROL
Supply
IOLINKFIP Output :
 Read/Write
(Direct Mode)  Enable
 Synchro-A
 Synchro-B
DIRECT/IO-BUS
 Clock (1Mhz)
Mode
I/O Registers
FIP Address
CONTROL
Input :
Input  Ready
Status Byte Registers

I/O-Conf 8 BYTES

FIP/WFIP Ouput
Frame Registers 4 BYTES
Tr
RS232 Rx & Tx Registers Serial Line
Speed (RS232) ( RS232 & Modbus
protocole)

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 45
 IOLINKFIP
Bus-I/O Mode
CONFIGURATION APPLICATION

Supply
CONTROL
Output :
 Read/Write
FIP Address IOLINKFIP  Enable
Direct IO-BUS (I/O-Bus Mode)  Synchro-A
Mode  Synchro-B
 Chip Select
Var-P Size (72 lines)
RAM  Clock
Var-C Size (1Mhz)
CONTROL
Status Byte Input :
Input Data  Data Ready

ADDRESS
FIP/WFIP (1 Byte)
Frame Output Data Rx
DATA
Tr (1 Byte)
& Tx Registers
(RS232) Serial Line
RS232 ( RS232 & Modbus
Speed protocole)

JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 46
 Technical Advantages of WorldFIP
For LHC Controls 1/2

 Communication Concept of One Producer to N Consumers.

 Distance only Limited by Medium Quality on Not by

Propagation Time.

 Transformer Coupling and Not Radiation Sensitive

Optocouplers

 Concept of Data Freshness (Producer) and Promptness.

(Consumer)

 Redundancy at Medium, Receiver and Transmitter Levels Fully

Specified in the Standard.
JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 47
 Technical Advantages of WorldFIP
For LHC Controls

2/2

 Bandwidth Sharing: Periodic, Aperiodic and Message Traffic

(Data Pipe Concept).
 Synchronization of the Transmission with Jitter<1uS for:
- Universal Time Distribution
- High Precision Time-Stamping
- LHC Machine Event Propagation/Recognition
- Possibility to Synchronize Devices All over LHC.
 TCP/IP Communication/Configuration Down to the Sensors.
 Embedded TCP/IP Stack and Web Server.
JCOP Meeting 11/07/2001 WorldFIP Protocol & Technology (R. BRUN & R RAUSCH) 48

 Qualified to LHC Machine Radiation Environment.