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Digital Logic Review1
Digital Logic Review1
Circuits n
DIGITAL LOGIC CIRCUITS
Logic Gates
Boolean Algebra
Map Specification
Combinational Circuits
Flip-Flops
Sequential Circuits
Memory Components
Binary Binary
Digital Digital
. Gate Outpu
Input
Signal . . t
Signal
- Truth Table
- Boolean Function
- Karnaugh Map
Computer Organization Computer Architectures Lab
Digital Logic 1 Logic
Circuits Gates
COMBINATIONAL GATES
Name Symbol Function Truth Table
A B X
A X=A•B 0 0 0
AND B
X or
X = AB
0
1
1
0
0
0
1 1 1
A B X
A 0 0 0
OR X X=A+B 0 1 1
B 1 0 1
1 1 1
A X
I A X X=A 0
1
A1 X
Buffer A X X=A 00
0
A 1B X
1
A 0 0 1
NAND X X = (AB)’ 0
1
1
0
1
1
B 1 1 0
A B X
A 0 0 1
NOR X X = (A + B)’ 0 1 0
B 1 0 0
1 1 0
A X=A ⊕B A B X
XOR X or 0 0 0
Exclusive 0 1 1
OR B X = A’B + AB’ 1 0 1
1 1 0
A B X
A X = (A ⊕ B)’
XNOR X or
0
0
0
1
1
0
Exclusive
NOR B X = A’B’+ AB 1 0 0
or 1 1 1
Equivalence
Computer Organization Computer Architectures Lab
Digital Logic 1
Circuits
(2) A
B
C F
(3) A
B
F
A,B,...,Z,a,b,...,z ⇒ A’,B’,...,Z’,a’,b’,...,z’
(p + q) ⇒ (p + q)’
AND ⇒ OR
OR ⇒ AND
Truth Boolean
Table Functio
n
Uniqu Many different expressions exist
e
Karnaugh Map(K-map) is a simple procedure for
simplifying Boolean expressions.
Truth
Table
Simplifie
Karnaugh d
Map Boolean
Boolea Function
n
functio
n
Computer Organization Computer Architectures Lab
Digital Logic 1 Combinational Logic
Circuits Circuits
COMBINATIONAL LOGIC CIRCUITS
y y
Half Adder x y c x
0 0 s0 0 0 0 1 c
y
0 x 01 x 1 0
0 1 0 c = xy s = xy’ + s
1 x’y
Full Adder 1 0 0 =x ⊕ y
1 y y
x y cn-1 1cn 1s 1
0 0 0 00 0 0 0 1
0 0 1 c 1 0 c
n-1 n-1
0 0 1 0 x 1 1 x 0 1
1 0 1 1 0
0 1 0 0 cn s
1
0 1 1 1 cn = xy + xcn-1+ ycn-1
0 = xy + (x ⊕ y)cn-1
1 0 0 0 s = x’y’cn-1+x’yc’n-1+xy’c’n-1+xycn-1
1 = x ⊕ y ⊕ cn-1 = (x ⊕ y) ⊕ cn-1
1x 0 1 1
y S
0
1 1 0 1
cn-1
0
1 1 1 1 cn
1
Computer Organization Computer Architectures Lab
Digital Logic 1 Combinational Logic
Circuits Circuits
COMBINATIONAL LOGIC CIRCUITS
4-to-1
Multiplexer Select
S1 Output
S0 Y
0 0 I0
0 1 I1
1 0 I2
1 1 I3
I0
I1
Y
I2
I3
S0
S1
Octal-to-Binary Encoder
D1 A0
D2
D3 A1
D4
D5 A2
D6
D7
2-to-4 Decoder
D0
E A1 A0 D0 D1 D2 D3 A0 D1
0 0 0 0 1 1 1
0 0 1 1 0 1 1 D2
0 1 0 1 1 0 1
0 1 1 1 1 1 0
1 d d 1 1 1 1 A1 D3
E
Cloc
k I0 I1 I2 I3
Shift Registers
Seria Serial
D D D D Outpu
l Q Q Q Q
Input t
C C C C
Clock
Bidirectional Shift Register with Parallel
Load A0 A1 A2 A3
Q Q Q Q
D C D C D C D C
4x 4x 4x 4x
1 1 1 1
MUX MUX MUX MUX
words
(byte, or n bytes)
N-1
Random Access Memory
k address
lines 2k Words
(n
Read bits/word)
Write
n data output
lines
Computer Organization Computer Architectures Lab
Digital Logic 1 Memory
Circuits Components
READ ONLY MEMORY(ROM)
Characteristics
- Perform read operation only, write operation is not possible
- Information stored in a ROM is made permanent
during production, and cannot be changed