DATA TRANSFER TECHNIQUES

BY : PRASHANT RAWAT
 TOPICS
 WHY I/O & MEMORY INTERFACING DIFFERENT?
 MODES OF DATA TRANSFER
 SYNCHRONOUS MODE
 ASYNCHRONOUS MODE
 EXAMPLE OF ASYNCHRONOUS MODE
 INTERRUPT DRIVEN MODE
 DMA MODE DATA TRANSFER
 INPUT OUTPUT PORT
 SUMMARY
WHY I/O & MEMORY INTERFACING DIFFERENT?

 Different types of Input Output devices.

 Mechanical, Electrical, Optical, etc.

 Wide range of speed

 Several bytes per minute to few megabytes per second.

 Different types of data format

 Serial / Parallel
 ASCII / Hollerith
 MODES OF DATA TRANSFER
DATA TRANSER TECHNIQUES

Parallel Serial

Synchronous Asynchronous

Programmed I/O DMA

Synchronous Asynchronous Interrupt driven

 SYNCHRONOUS MODE
 Compatible in speed.
 Speed characteristic is precisely known.

Start Start

Send – Get ready

Execute I/O signal to I/O device
Instruction

Generate delay

Stop
Execute I/O
Instruction

 Simple flow. Stop

 Not suitable when speed characteristics of I/O is not known.
 ASYNCHRONOUS MODE
 Suitable when timing characteristics of I/O devices are not known.
 CPU checks the device to be ready to execute instruction.
 Precious CPU time is wasted.
Start

Send – Get ready Req

signal to the I/O Handshaking
I/O Signals
device Ack

Is the
N device
ready
Y
Execute I/O
Instruction
 EXAMPLE : ASYNCHRONOUS MODE

Address

Micro
processor Chip Memory
Decoder select

Ready signal

Clock T1 T2 T3 T4

Ready
 INTERRUPT DRIVEN MODE
Start Start

Send – Get
ready signal to
I/O Push processor
status
I/O device

Execute I/O Instruction

Fetch and Execute
instructions

Restore processor status

Is there
any From I/O
interrupt
Y Return
N
Save processor status
and jump to ISS
 DMA MODE DATA TRANSFER

Memory
Tristate device
Address, Data

Micro
processor
Req I/O device I/O devie
HOLD Req Ack
Grant
HLDA Grant
Req
8085
DMA Controller
 DMA MODE OF DTATA TRANSFER
Start
I/O device sends DMA
Initialize DMA req to DMA controller
controller

Send- Get ready to I/O I/O To DMA controller

microprocessor sends DMA req

Fetch instruction & execute

DMA Controller

Is DMA
N To Perform block data transfer
req
microprocessor and withdraw DMA req
active?

Y
Generates DMA To controller
grant signals DMA
 INPUT OUTPUT PORT
Device Chip
Selection select
logic

Micro I/O device

processor Req
Ack
INT
I/O Port

 Bus compatibility, tristate buffer.

 Device selection logic.
 Data buffers, control/status register.
 Handshaking signals, internal signals.
Let’s summarize…!!!