Microprocessors

Yashar Hajiyev
Azerbaijan Caucasus University
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Input/Output (I/O) Instructions

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➤ Network ports — are used to connect a computer to a computer network via a networking
cable—typically a cable using an RJ-45 connector, — similar to telephone connector but is
larger ;

➤ USB ports — to connect USB devices ( keyboards, mice, printers, hard drives, and digital
cameras) to computer via USB connector.
Multiple USB devices can connect to single USB port via a USB hub,
Mini -USB ports or micro-USB ports are often included on mobile devices instead of
full-sized USB port. ;

➤ FireWire (IEEE 1394) ports are used to connect

FireWire devices to the computer via a FireWire connector. Similar to a USB hub,
a FireWire hub can be used to connect multiple devices to a single port. FireWire
connections are most often used with digital video cameras and other multimedia
peripherals.

➤ IrDA (Infrared Data Association) ports and Bluetooth ports are used to receive wireless
transmissions from devices;,
These ports do not use a plug.
IrDA ports are commonly used to “beam” data from a portable computer or mobile device to
a computer.

➤Bluetooth ports are most often used with wireless keyboards, mice, and headsets.
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➤ Flash memory card slots — ➤ are used to connect flash memory
cards or other hardware using a flash memory card interface. Some hardware for
portable computers is designed to connect using these slots;

➤ Audio ports are used to connect speakers, headphones, or a microphone to the

computer.
➤ eSATA (external SATA) ports are used to connect external SATA devices (external
hard drive). External hard drives that connect via eSATA are faster than external hard
drives that connect via a USB or FireWire connection.
➤ Thunderbolt ports (available on Apple devices at present time) are used
to connect peripheral devices (storage devices and monitors) via Thunderbolt
cables. At 10 Gbps, Thunderbolt is extremely fast and up to six devices can be daisy
chained together to connect them via a single Thunderbolt port..
➤ VGA — (Video Graphics Array), — uses 15-pin D-shaped connector and is a
computing standard — resolution of 640 × 480 pixels with 16 colours or of 320 × 200
pixels with 256 colours. SVGA (super VGA) is a later version with higher spatial
and colour resolution, esp 800 × 600 pixels with 256 colours
➤ DVI — (Digital Visual Interface), — DVI uses rectangular connector and it is used
with flat-panel displays to allow the monitor to receive clearer, more reliable digital
signals than is possible with a VGA interface;
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➤ VGA — (Video Graphics Array), — uses 15-pin D-shaped connector and it is
commonly used with CRT monitors and many flat-panel monitors to transfer analog
images to the monitor.
➤ DVI — (Digital Visual Interface), — DVI uses rectangular connector and it is used
with flat-panel displays to allow the monitor to receive clearer, more reliable digital
signals than is possible with a VGA interface;

➤HDMI — (High-Definition Multimedia Interface) — HDMI is a newer type of

digital connection that uses a smaller connector and can be used with display devices
that support high-definition content. ,

➤SATA — ( Serial ATA ) - hardware interface for peripheral devices that supports
both SATA and PCI Express (PCIe). SATA hard disk drives could transfer data at
maximum (not average) rates of up to 157 MB/s.

➤ATA — (Advanced Technology Attachment) - hardware

➤PCI — ( Peripheral Component Interconnect ) — uses a shared parallel bus

architecture, in which the PCI host and all devices share a common set of address,
data and control lines.
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Typical ports for portable computers

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I/O architecture of Computer Systems

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I/O architecture of Computer Systems

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 BUS Structure

• Processor:
♦ reads in instructions and data, writes out
data after processing;
♦ uses control signals to control the overall
operation of system;
♦ receives interrupt signals;

The interconnection structure  support transfers:

• Memory to processor: The processor reads an instruction or a unit of data
from memory.

• Processor to memory: The processor writes a unit of data to memory.

• I/O to processor: The processor reads data from an I/O device via an I/O
module.
• Processor to I/O: The processor sends data to the I/O device.

• I/O to or from memory:

For these two cases, an I/O module is allowed to exchange
data directly with memory, without going through processor,
using Direct Memory Access (DMA).

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The most common of I/O chips are either Parallel
Input/Output (PIO), Serial I/O (UART, or Universal Asynchronous
Receiver/Transmitter), CTC (Counter Timer Circuit) and FDC(Floppy Disk
Controller).
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 Input/Output (I/O) modules for MP

Input/ Output architecture → is computer/microprocessor interface and means

of controlling interaction with outside peripheral elements and systems.

I/O → is 3rd key elements of MP system (after MP and set of memory modules)
and it provides Operational System with info to manage associated external
devices.

Because of wide variety of peripherals with various methods of

(slower, different data formats, and word lengths) operation →
there exist 3 principal I/O techniques 

Programmed I/O → input/output operation occurs under continuous control of program

requests;

Interrupt-driven I/O → programs issues I/O commands, and then input/output operation occurs
under continuous control of program requests.
Until signal of end of I/O operation;

Direct memory (DMA) access I/O → specialized I/O microprocessor directly controls of I/O
operations to move large data volume.
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 Input/Output (I/O) architecture of Computer Systems II

Three categories of external devices →

Human readable – suitable for communication with

computer users;

Machine readable – suitable for communication

with equipment;

Communication – suitable for communication

with remote devices;

Control signals from I/O module –

determine the functions of device →
Send/accept data from/to I/O module;

Status signals – indicates state of

device →is ready or not for data transform

Buffer size– 8-16 bits;

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Input/Output (I/O) architecture of Computer Systems II

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 Keyboard/monitor interaction arrangement

User provides input through keyboard → transmitted to computer → then displayed on

monitor;

The basic unit for exchange is

character.
International Reference
Alphabet (IRA) – 128
characters – by 7 bits;

8th-bit is parity bit for error

detection .
Two types characters –
→ printable (alphabetic,
numeric), and
→ control (controlling
the printing and displaying
of characters);

“K” → 1001011

American Standard Code for

Information Interchange
(ASCII) is US national version of
IRA.
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IRA Control Characters

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IRA Control Characters

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IRA Control Characters

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 Input/Output (I/O) Modules

Major Functions → Control and timing ; Processor Communication;

Device Communication; Data Buffering

I/O module – coordinates – the flow of traffic between internal recourses and
external devices;
– sharing of memory and system bus among number of activities;

Sequence of steps to transfer data from external device to MP:

→ MP ask I/O module to check status of external device;
→ I/O module returns status of external device;
→ if device is operational → MP commands to I/O module to arrange
transfer of data;
→ I/O obtains data from device and transfers it to MP ;

Processor – I/O communication includes:

Command decoding → I/O module accept MP commands through control bus.

I/O of disk drive accept commands →READ SECTOR; WRITE

SECTOR; SEEK truck number; SCAN record ID .The parameters for last
two come through data-bus;

Data → are exchanged between I/O module and MP through data bus.

Status reporting → common status signals BUSY, READY to be sent to MP;

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Address recognition → I/O module must recognize one unique address for each
device;
Input/Output (I/O) Modules

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 Input/Output (I/O) Modules
Principles of I/O Hardware

Some typical device, network, and data base

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 Input/Output (I/O) Modules Architecture

I/O modules →
Presenting high
level interface to
MP → is called I/O
channel or I/O
processor.

Primitive I/O – is
called I/O controller;
or device controller

Data transferred to/from I/O module → are buffered in registers.

Status register → provides info on status
and may hold a control signals from MP.
MP uses control lines → to issue commands to I/O module;
MP logic → is specific to each device that it control ;
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 Input/Output (I/O) Modules

With Programmed I/O → MP issues a program that gives full control over I/O module
operations Data transferred to/from I/O module sensing device status, sending a
read/write command, transferring data.
Interrupt driven I/O → MP is interrupted by I/O module.

In both of them the MP is responsible for extracting/storing data to/from memory.

Direct memory access I/O → MP doesn’t involved in data exchange between I/O and
memory modules.

Four types of I/O commands issued by MP 

1) Control commands ─ to control and regulate operating of I/O;
2)Test commands ─to test availability of peripheral elements;
3)Read commands ─to obtain data from peripheral and place it in internal buffer;
4)Write commands ─ take data from data bus and transmit to peripheral
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Input/Output (I/O) Algorithms

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Memory-Mapped I/O (1)

 Separate I/O and memory space

 Memory-mapped I/O
 Hybrid
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 Input/Output (I/O) Instructions

Memory-Mapped I/O (2)

(a) A single-bus architecture

(b) A dual-bus memory architecture 36
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IO Interrupts

How interrupts happens. Connections between devices

and interrupt controller actually use interrupt lines on
the bus
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 Input/Output (I/O) Instructions

Two bytes instructions which cause Data to be input to or output from

the INTEL 8080

The device number is a hardware characteristic of the input or output

device, not under the programmer's control.

The general assembly language format is:

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 Input/Output (I/O) Instructions

The general assembly language format is:

Two bytes instructions which cause Data to be input to or output from

the INTEL 8080

The device number is a hardware characteristic of the input or output

device, not under the programmer's control.
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Input/Output (I/O) Instructions

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Input/Output (I/O) Instructions

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 Programmed Input/Output (I/O)

Each device connected through

I/O to system has got unique address.
The processor commands contain address
of desired devices.

Two modes of addressing 

1. Memory mapping → single address
space for memory and I/O devices.
CMP treats I/O devices as memory
elements.

2. Isolated I/O → full address range is

shared. But, Command bus
contains memory read/write, plus
input/output command lines for I/O.
Command lines specifies where
address codes refer to.

Assume 10-bit address  512 bit

memory location (0-511)and up to 512
I/O addresses (512-1023)

Problem  MP should wait long time until

I/O will be ready for
reception/transmission data.
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 Interrupt-Driven Input/Output (I/O)

How it works  the I/O module receives READ command from MP .

I/O proceeds to read data from peripheral device. Once data are in module’s data register/buffer →
the interrupt signal from I/O module is send through control line to MP. When request signal
comes from MP → I/O places data on data bus.
Functioning of Interrupt-Driven Input/Output (I/O)

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 Configuration of system of Interrupt-Driven
Input/Output (I/O)

Two design issues for Interrupt driven I/O module  1.How does processor deterermine
which device issued interrupt;
2. If multiple Interruption signals → how decide which to proceed?

Decide identification  4 categories of technique 

Multiple interrupt lines  between MP and I/O; in practice each line several
attached I/O modules.

Software poll (time consuming)  determine which I/O module causes interrupt 
MP raises TESTI/O command and places address code of device on address bus. I/O
contains addressable status register. Positive signal comes to MP from active I/O.
MP reads status signal and branches to device specific service program;

Daisy chain (hardware poll, vectored)  When MP senses interrupt signal, it sends
signal through Interrupt acknowledge line is daisy chained through all I/O modules.
Signal propagates through all I/O and gets to requested module.
That module responds by placing word (vector) (address codes) on data bus.
After MP sends address codes of active device → vectored interrupt

Bus arbitration (vectored).

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 Intel 82C55 Programmable Peripheral Interface

24 I/O lines → are

divided into three 8-
bit groups (A,B,C) are
working as outlet and
inlet I/O ports.

4-bit groups (CA and

CB) and they curry
control and status
signal for A and B
I/O ports

Left side is internal

Interface to INTELL
80386 (D0-D7) to
transfer data to/from
I/O and transfer
control INFO to
control register.

Control register is loaded by MP to control the mode of operations.

Transfer take place when Chip Select is enabled with Read and Write signals.

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 Intel 82C55 Programmable Peripheral Interface

The control signals → for two

purposes → hand shaking and
interrupt signals

hand shaking → is timing

mechanisms → one control line is
used to send DATA READY → to
indicate that data present on I/O
lines.
Other control line → is Acknowledge
line to indicate → data have been
read, and data line might be cleared.

Another control line → is

Interrupt Request line and tied back
to the system bus.

Keyboard → 8 bits of input. Two of this bits Shift and Control have special
meaning to the keyboard-handling program executing in the processor.
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Direct Memory Access

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Intel 8237 DMA Controller

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I/O Channel Architecture

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