Digital Logic Design

Combinational circuits
 our story so far...

digital circuit specification
 inputs and outputs
 truth table of each output
 (or Boolean-algebraic representation)
 don't -care conditions (if any)

truth table -> K-map

K-map -> simplified algebraic expression

algebraic expression -> gate implementation
 AND-OR, OR-AND, NAND, NOR, XOR, etc.

combinational circuits (today's lecture)
 no memory
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 combinational circuits

inputs

outputs

logic gates

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 combinational circuit
representation
if a combinational circuit has n inputs and m
outputs, then it can be represented as:
 m truth tables (how many rows in each table?)
 m Boolean functions; one for each output

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 combinational circuits and
memory

in combinational circuits, outputs depend on
present inputs

combinational circuits have no memory of past
inputs and outputs

sequential circuits (described later) have
memory (storage elements)

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 combinational circuit design

digital circuit specification
 inputs and outputs
 truth table of each output
 (or Boolean-algebraic representation)
 don't -care conditions (if any)

truth table -> K-map

K-map -> simplified algebraic expression

algebraic expression -> gate implementation
 AND-OR, OR-AND, NAND, NOR, XOR, etc.

verification

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 example 1: decimal code
conversion
Design a circuit that converts BCD code into
excess-3 code


BCD code and excess-3 code both represent
decimal numbers

BCD code and excess-3 code both have 4 bits

1 in BCD is 0001

1 in excess-3 is 0100

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 step 1: specification

how many input bits?

how many output bits?

truth table or Boolean expression for each
output

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step 1: specification

don't-
care

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 step 2: simplification
K-map for each output

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step 2: simplification

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step 2: simplification

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step 2: simplification

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step 2: simplification

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step 2: simplification

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step 2: simplification

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step 2: simplification

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step 2: simplification

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 step 2: simplification

algebraic manipulation

K-map

multiple simplified expressions; which one to
choose?
 fewer gates
 fewer inputs per gate
 propagation time through the gates (one-level, two-
levels, etc.)
 number of gates connected to one output
 other criteria

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step 3: implementation

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step 3: implementation

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step 3: implementation

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step 3: implementation

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 step 3: implementation

how many gates in total?

how many levels?

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 step 3: implementation
can we get fewer gates?

z = D'
w = A + BC + BD = A + B(C + D)
x = B'C + B'D + BC'D' = B'(C + D) + B (C+D)'
y = CD + C'D' = CD + (C + D)'

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 step 3: implementation
can we get fewer gates?

z = D'
w = A + BC + BD = A + B(C + D)
x = B'C + B'D + BC'D' = B'(C + D) + B (C+D)'
y = CD + C'D' = CD + (C + D)'

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 step 3: implementation
z = D' w = A + B(C + D) x = B'(C + D) + B (C+D)'
y = CD + (C + D)'
how many gates in total?
how many levels?

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 step 3: implementation

7 AND + 3 OR
which one is better?
2 and 3 inputs
per gate
2 levels 4 AND + 4 OR + 1 inverter
2 inputs per gate
4 levels

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 example 2: binary adder
Design a circuit that adds two n-bit binary
numbers


0+0=0 Add two 5-bit

0+1=1 numbers:

1+0=1 1 1

1 + 1 = 10 01001
+11010
carry --------------
1 0 0 0 11

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 example 2: binary add/subtract
we can follow the same steps as before:

step 1: specification
 2n inputs
 n+1 outputs
 truth table

step 2: simplification

step 3: implementation

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 example 2: binary add/subtract
we will take another approach
 bottom-up approach
 building circuit in blocks

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 smallest block: half-adder

circuit that adds two bits (half-adder)

2 inputs (x and y) and 2 outputs (Sum and
Carry)

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 half-adder

step 1: specification

step 2: simplification
 S = x'y + xy'
 C = xy


step 3: implementation

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 full-adder: one step up

3 inputs (two bits and carry)

2 outputs: sum and carry

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 full-adder: one step up

3 inputs (two bits and carry)

2 outputs: sum and carry

implementation using half-adders
S1 S
z
half-adder
S0 1 C1
x
half-adder
0 C0 C
y

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 4-bit binary adder: one step up

adds two 4-bit binary numbers (add an input
carry)

K-map design: 9 inputs ... too much

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 4-bit binary adder: one step up

adds two 4-bit binary numbers (add an input
carry)

using four full adders

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 example: binary subtractor

subtracts two n-bit binary numbers

how many inputs? outputs?
7 0111 0111
- 5 - 0101 +1010
2's complement
------ --------- + 1
of 0101
---------
10010
7 0111 0111
- 9 -1001 + 0110
2's complement
------ --------- + 1
of 1001
---------
01110
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 example: binary subtractor
A – B = A + (1's complement of B) + 1

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 overflow

if the sum of two n-bit numbers occupies n+1
bits, an overflow has occurred

computers must detect overflow...why?

we will add a circuit to detect overflow

overflow detection depends on whether the two
added numbers are signed or unsigned

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 overflow detection

unsigned: end carry => overflow

signed: last bit is the sign

if the last two carries are equal => no overflow

if the last two carries are not equal => overflow

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 overflow detection

C3 XOR C4 = 1 when?

C3 XOR C4 = 0 when?

V (overflow detection) = C3 XOR C4

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