WEL-COME

VEDIC MULTIPLAYER
 “A Pre-Project Report On Vedic Multiplayer”
By
Ramkunwar Meghwal 2018BECE026
Jitendera Meena 2018BECE046
Under the Guidance of of
Prof. Burhan Khurshid
Dept of Electronics and Communication NIT SRINAGAR(190006)
• Introduction
• Application of Vedic Multiplayer
• Operation OF 2 X2 Vedic Multiplayer
• 2x2 Block Diagram
• 4x4 Vedic Multiplayer Block Diagram
• Advatages
• Disadvatages
• CONCLUSION
• Introduction: Vedic mathematics is the name given to the ancient Indian system of
mathematics that was rediscovered in early twentieth century. Vedic mathematics
is mainly based on sixteen principles or word-formulae which are termed as
Sutras. application of Vedic mathematics to digital signal processing in the light
Vedic multiplication algorithm to digital multipliers. A simple digital multiplier
(referred henceforth as Vedic multiplier) architecture based on the Urdhva
Triyakbhyam (Vertically and Cross wise) Sutra is presented.
• Multiplication can be consider as the sequence of addition andshift operations.
•  Each step of the addition will produce a partial product.
• Adding the each bit method is slow, therefore the Multiplier’s
• are introduced
• These multiplier’s multiply the two binary numbers.
•  Multiplication can be implemented using many algorithms suchas array, Booth, Wallace tree
and many more.
• sutra can be used for multiplication of 2x2, 4x4 and up to NxN and also lot of computation time.
• Application of Vedic Multiplayer

• It is extensively used in DSP and image processing applications

• Fast Fourier Transform (FFT)

• convolution, correlation, filtering

• in ALU of microprocessors.

• Therefore, high speed, low area and power efficient multiplier design remain the critical
factors for the overall system.
OPERATION OF 2 X2 VEDICMULTIPLIER

• The Urdhva-Tiryagbhyam sutra means the multiplication will be done in vertical and

cross wise operation.
•  The 2 X 2 Vedic multiplier is multiplied in three steps.
• Step1:
•  The first LSB of the two binary numbers to be multiplied vertically and these numbers
are added with the previous carry, in this case the previous carry is zero. In the output
bits the LSB bit will be taken as a result and the remaining bits are forwarded to the
next step.
• Step2:
•  In this step the two binary bits can be multiplied cross wise and the produced results will be added
to the previously generated carry and again, in the output bits the LSB bit will be taken as the
result and the remaining bits are forwarded to the next step.
• Step3:
•  In this step the MSB bits to be multiplied vertically and the result of this is added to the
previously generated carry and the output is taken as the result.
URDHVA-TRIYAKBHYAM SUTRA FOR
DECIMAL NUMBERS
BLOCK DIAGRAM
4X4 VEDIC MULTIPLAYER
• From the previous block diagram we observe that toimplement this multiplier we need 4 AND
gates and 2Half adder circuits.
•  In order to reduce the power consumption and time delay
of the multiplier we are going to use the GDI(Gate Diffusion Input) technique.
•  Along with GDI technique the Half Adder circuit is implemented with Multiplexer

• Advatages::

• Vedic Multiplayer is Faster than Array Multiplayer and booth Multiplayer.

• The area needed for Vedic multiplayer is very small as compared to other multiplayer architecture

• Disadvantage:

• For complex multiplications even the system become complex

CONCLUSION

• The low power and high speed adders are required in the multipliers to decrease the power
consumption and to increase the speed. In this project we are implemented the basic
half adder circuit which is major block of the multiplier. To increase the speed and decrease the
power consumption in the
• adders we are going to use the GDI technique which can
• reduce the number of the transistors. The 2X2 Vedic multiplier is used to multiply the two binary
numbers and hence this multiplier can cause less power consumption and less delay. To
• increase the speed, we are going using these fast adders to
• implement the Vedic multiplier such that the power consumption of multiplier will be less.
THANKING YOU