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Controller Area Network

( CAN)

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1) Basic Concept
2) Properties of CAN protocol
3) Frame Formats
4) Error Detection
5) Error Confinement Mechanisms
6) CAN Protocol Versions

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Basic Concept
• It was developed by Robert Bosch GmbH, Germany, in the late
1980s.
• CAN is a multi-master bus with an open, linear structure with
one logic bus line and equal nodes. The number of nodes is
not limited by the protocol (Theoretically).
• Nodes do not have a specific address. Instead, the address
and priority information is contained in the identifiers of the
transmitted messages.
• The number of nodes may be changed dynamically without
disturbing the communication of the other nodes.
• CAN provides sophisticated error-detection and error handling
mechanisms.
• There is a high data transfer rate of 1000 kilobits per second at
a maximum bus length of 40 meters or 130 feet when using a
twisted wire pair which is the most common bus medium used
for CAN.

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Basic Concept Continue

• There are two bus states, called "dominant” (logic 0) and
"recessive“(logic 1).

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Properties of CAN protocol

• Prioritization of messages
• Guarantee of latency times
• Multicast reception with time synchronization
• Configuration flexibility
• Multi master
• Error detection and signaling
• Automatic retransmission of corrupted messages as soon as the
bus is idle again
• Distinction between temporary errors and permanent failures of
nodes and autonomous switching off of defect nodes
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CAN Frame
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Frame Formats
• Data Frame
• Remote Frame
• Error Frame
• Overload Frame
• Interframe Space

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Data Frame

• Data Frame is generated by CAN node when the node

wishes to transmit data.
• Data Frame composed of seven different field.

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Data Frame
1bit Dominant The frame begins with a dominant Start Of Frame bit
Start Bit Start

11bit The 11-bit Identifier, which reflects the contents and priority of the
Identifier
message
Arbitration Field
1bit Dominant The RTR bit is used to distinguish a Data Frame and Remote
RTR
frame.

IDE(Identifier 1bit Dominant Its dominant state specify that the frame is a Standard Frame.
Extension)

Control Field Reserved 1bit Dominant

4bit Data Length Code (DLC) and specify the number of bytes of data
Data length Bit contained in the message (0 - 8 bytes).

0 to 8 The data being sent follows in the Data Field which is of the length
Data Field 0 to 64 bit
byte defined by the DLC above (0, 8, 16, ...., 56 or 64 bits).

15bit Cyclic Redundancy Field (CRC field) follows and is used to detect
CRC sequence
CRC field possible transmission errors.

CRC delimiter 1bit Recessive

1bit Recessive Transmitting node sends out a recessive bit. Any node that has
ACK slot received an error free frame acknowledges by sending back a
Acknowledge field dominant bit.

ACK delimiter 1bit Dominant

End of Frame End 7bit Recessive Seven recessive bits (End of Frame) end the Data Frame
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Arbitration
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Remote Frame

• If a node wishes to request the data from the source, it

sends a Remote Frame with an identifier that matches the
identifier of the required Data Frame. The appropriate
data source node will then send a Data Frame as a
response to this remote request

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Remote Frame
Start Bit Start 1 Dominant The frame begins with a dominant Start Of Frame bit
11 The 11-bit Identifier, which reflects the contents and priority of the
Identifier
message
Arbitration Field
1 Recessive The RTR bit is used to distinguish a Data Frame and Remote
RTR
frame.
IDE(Identif 1 Dominant Its dominant state specify that the frame is a Standard Frame.
ier
Extension)
Control Field
Reserved 1 Dominant

Data 4 Data Length Code (DLC) and specify the number of bytes of data
length Bit contained in the message (0 - 8 bytes).
Data Field No Data field
CRC 15 Cyclic Redundancy Field (CRC field) follows and is used to detect
sequence possible transmission errors.
CRC field
CRC 1 Recessive
delimiter
1 Recessive Transmitting node sends out a recessive bit. Any node that has
ACK slot received an error free frame acknowledges by sending back a
Acknowledge dominant bit.
field
ACK 1 Dominant
delimiter
End of Frame End 7 Recessive Seven recessive bits (End of Frame) end the Data Frame
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Error Frame

• An Error Frame is generated by any node that detects a

bus error.
• There are two forms of Error Flag fields. The form of the
Error Flag field depends on the “error status” of the node
that detects the error

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ACTIVE ERRORS
If an error-active node detects a bus error, the node interrupts
transmission of the current message by generating an active error flag.
The active error flag is composed of six consecutive dominant bits. This
bit sequence actively violates the bit-stuffing rule. All other stations
recognize the resulting bit-stuffing error and, in turn, generate error
frames themselves, called error echo flags.
The error flag field, therefore, consists of between six and twelve
consecutive dominant bits (generated by one or more nodes). The error
delimiter field (eight recessive bits) completes the error frame. Upon
completion of the error frame, bus activity returns to normal and the
interrupted node attempts to resend the aborted message.
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PASSIVE ERRORS
If an error-passive node detects a bus error, the node transmits an error-
passive flag followed by the error delimiter field. The error-passive flag
consists of six consecutive recessive bits. The error frame for an
errorpassive node consists of 14 recessive bits. From this it
follows that, unless the bus error is detected by an erroractive node or
the transmitting node, the message will continue transmission because
the error-passive flag does not interfere with the bus.
If the transmitting node generates an error-passive flag, it will cause
other nodes to generate error frames due to the resulting bit-stuffing
violation. After transmission of an error frame, an error-passive node
must wait for six consecutive recessive bits on the bus before
attempting to rejoin bus communications. The error delimiter consists of
eight recessive bits and allows the bus nodes to restart bus
communications cleanly after an error has occurred.
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Error Confinement Mechanisms

Each node maintains two error counters:

•Transmit Error Counter – Increment by 8 error count .

•Receive Error Counter – Increment by 1 error count .

Transmitting Receiving
Error Error

Receiving
Error

Active Error (Transmitting or Receive Error Counter less then 127 count)
15/11/2004
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Error Confinement Mechanisms

Transmitting
Error

Passive Error (Transmitting Error Counter less then 255 )

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Error Confinement Mechanisms

Bus Off (Transmitting Error Counter greater then 255 )

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Error Frame
6 to 12 dominant If an “error-active” node detects a bus error then the node
Active bit(for interrupts transmission of the current message by generating an
Error Flag more then “active error flag”. The “active error flag” is composed of six
one node) consecutive dominant bits.
Error Flag
6 to 12 Recessive When any one of the two Error Counters raises above 127. when
Passive bit(for the Transmit Error Counter raises above 255 . A node which is Bus
Error Flag more then Off will not transmit anything on the bus at all.
one node
Error 8 Recessive
Delimiter Recessiv
Field e bit
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Over load Frame

• Used to delay the next CAN message.

• same format as an “active” Error Frame .
• An Overload Frame, can only be generated during
Interframe Space.
• A node may generate a maximum of 2 sequential
Overload Frames to delay the start of the next message.

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Overload Frame
6 to 12 dominant The Overload Flag consists of six dominant bits followed by
Overload bit(for Overload Flags generated by other nodes (as for “active error
Flag more then flag”, again giving a maximum of twelve dominant bits).
one node
Overload 8 Recessive
Delimiter Recessiv
Field e bit

An overload frame can be generated by a node as a result of

two
conditions:
1.The node detects a dominant bit during the interframe space
, an illegal condition.
Exception: The dominant bit is detected during the third bit of IFS. In
this case, the receivers will interpret this as start of frame .
2.Due to internal conditions, the node is not yet
able to begin reception of the next message
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Interframe Space Frame

Interframe
space for
Active error
node.

Interframe
space for
Passive
error node.

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1. Interframe Space separates a preceding frame (of whatever

type) from a following Data or Remote Frame.

Interframe Space Frame

Intermission 3 bit Recessive Interframe space is composed of at least 3

recessive bits, these bits are termed the
Interframe Intermission.
space
Active Error Same As above Recessive
node

Passive Error 3 + 8 Suspend Recessive In this case, these nodes have to wait another
node Transmission eight recessive bits called Suspend
Transmission before the bus turns into bus idle.
Bus Idol Due to this mechanism error active nodes have
the chance to transmit their messages before
the error passive nodes are allowed to start a
transmission.
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Error Detection

• Cyclic Redundancy Check or CRC

• Acknowledge
• Frame Check
• Bit Monitoring
• Bit Stuffing Check

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Cyclic Redundancy Check or CRC

1. With the Cyclic Redundancy Check, the transmitter calculates

a check sum for the bit sequence from the start of frame bit
until the end of the Data Field.
2. This CRC sequence is transmitted in the CRC Field of the CAN
frame.
3. The receiving node also calculates the CRC sequence using
the same formula and performs a comparison to the
received sequence.

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Acknowledge

1. With the Acknowledge Check the transmitter checks in the

Acknowledge Field of a message to determine if the
Acknowledge Slot, which is sent out as a recessive bit,
contains a dominant bit.
2. If this is the case, at least one other node has received the
frame correctly.
3. If not, an Acknowledge Error has occurred and the message
has to be repeated.

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Frame Check
Some parts of the CAN message have a fixed format, i.e. the
standard defines exactly what levels must occur and when,
If a CAN controller detects an invalid value in one of these
fixed fields, a Form Error is signaled.

•CRC Delimiter,
•Acknowledge Delimiter,
•End of Frame
•Interframe Space

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Bit Monitoring
1.All nodes perform Bit Monitoring: A Bit Error occurs if a transmitter
sends a dominant bit but detects a recessive bit on the bus line or, sends a
recessive bit but detects a dominant bit on the bus line.

2.An Error Frame is generated and the message is repeated.

3.When a dominant bit is detected instead of a recessive bit, no error

occurs during the
• Arbitration Field
• Acknowledge Slot

because these fields must be able to be overwritten by a dominant bit in

order to achieve arbitration and acknowledge functionality.

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Bit stuffing

The coding of the individual bits is tested at bit level. The bit
representation used by CAN is NRZ (non-return-to-zero) coding, which
guarantees maximum efficiency in bit coding. The synchronization edges
are generated by means of bit stuffing, i.e. after five consecutive equal
bits the sender inserts into the bit stream a stuff bit with the
complementary value, which is removed by the receivers. The code check
is limited to checking adherence to the stuffing rule.
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Bit stuffing
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Edge phase error adjustment

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Set by
Synchronizati
on jump
width ( TSJW
)
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CAN Protocol Versions (cont.)

There are three different types of CAN modules available.

1. 2.0A - Considers 29 bit ID as an error

2. 2.0B Passive - Ignores 29 bit ID messages
3. 2.0B Active - Handles both 11 and 29 bit ID Messages