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DIGITAL VOLTMETER

ANJANI
ASST.
PROFESSOR
DEPT OF ECE
Lesson plan:
Sl No Topic Date Date Remark
planned engaged

1. Ramp technique

2.

3.

4.

5.
Introduction
DVM are measuring instruments that
convert analog signal into digital or
numeric readout.
It is capable of measuring analog dc
voltages.
With appropriate signal conditioner
preceding the input of the DVM, quantities
such as pressure, temperature, ac voltage,
ohms, dc and ac current can be measured
Introduction
The common element in all the signal
conditioner is the dc voltage which is
proportional to the level of the unknown
quantity being measured.
This dc output is then measured by DVM.
Classification of DVM:
DVM can be categorized based on the
following factor:
1. Number of digits
2. Number of measurements
3. Accuracy
4. Speed of reading
5. Digital output of several types
Ramp technique:
It is to measure the time that a linear ramp
takes to change input level to ground level
or vice versa.
The time period is measured with an
electronic time interval counter.
Count is displayed as number of digits on
display.
Ramp may be positive or negative.
Ramp technique:
Ramp technique:
Ramp technique:
Ramp technique(working):
1. Ramp voltage is initiated.
2. Ramp voltage is continuously compared
with the voltage being measured.
3. When 2 voltage become equal, a
coincidence circuit generates a pulse
which opens a gate(i.e start pulse).
4. When the ramp voltage reaches ground
potential, ground comparator generates
stop pulse.
Ramp technique:
5. The time duration of gate opening is
proportional to the input voltage value.
6. In the time interval start and stop pulses,
gate opens oscillator circuit drives counter.
7. So the voltage is converted into time and
time count represents the magnitude of
voltage.
Advantages:
1. Easy to design
2. Low cost
3. Can be transmitted over the long feeder lines

Disdvantages:
1. Very much sensitive to input signal noise.
Dual slope integrated type DVM:
Dual slope integrated type DVM:
Dual slope integrated type DVM:
At a start a pulse resets the counter and F/F
output to logic level 0, Si is closed and Sr is open.
Capacitor begins to charge, when integrator
output exceeds zero, comparator output changes
state which opens gate so clock pulses fed to
counter.
When counter reaches maximum count(i.e 9999)
at time t1, on the next clock pulse all the digit go
to 0000 and activates the F/F to logic 1.
Dual slope integrated type DVM:
Logic 1 connects switch Sr to integrator.
Integrator output now decreases linearly to 0.
Discharge time t2 is proportional to input
voltage.
When negative slope reaches zero,
comparator switches to state 0 and gate
closes, capacitor C discharged with constant
slope.
Integrating type DVM:
Integrating type DVM:
Integrating type DVM:
A constant input voltage is integrated and
slope of ramp is proportional to input
voltage.
When output reaches certain value it
discharges to 0 and another cycle begins.
Frequency of the output waveform is
proportional to input voltage.
Integrating type DVM:
Input voltage produces charging current ei/R1
that charges the capacitor C to reference voltage
er .
When er is reached, comparator changes state,
so trigger precision pulse generator.
A pulse of precision charge content that rapidly
discharge capacitor.
Charging and discharging produces frequency
proportional to ei
Commonly used principles of ADC:
Direct compensation:
Input signal compared with an internally
generated voltage which is increased in
steps starting from zero.
The number of steps needed to reach full
compensation is counted.
A compensation type is staircase ramp.
Staircase ramp:
1. The input Vi is compared with an internal
staircase voltage Vc (clock)
2. A counter counting pulses and DAC
converting digital output into dc signal.
3. When Vc=Vi input comparator closes gate
between clock and counter.
4. Counter stops and output is shown on the
display.
Staircase ramp:
Staircase ramp:
 Clock generates pulses continuously.
 At t1 counter reset to 0, so DAC is also 0.
 When Vi≠0 input comparator applies an output
voltage that opens gate.
 So clock pulses pass on to counter through
gate.
 Counter start counting, DAC start produces
output voltage increased by one small step at
each count of the counter.
Staircase ramp:
 The process continues until staircase
voltage is equal to or greater than input
voltage Vi.
 At t2, output voltage of the input
comparator changes state or polarity.
 So gate closes and counter stopped,
display show the result.
Successive approximation:
Successive approximation:
Vin=1 Operation D D D D D D D D Compar Output Voltag
7 6 5 4 3 2 1 0 e e

0011001 D7 set 1 0 0 0 0 0 0 0 Vin<Vou D7 2.5


1 t reset
0011001 D6 set 0 1 0 0 0 0 0 0 Vin<Vou D6 1.25
1 t reset
0011001 D5 set 0 0 1 0 0 0 0 0 Vin>Vou D5 set 0.625
1 t
0011001 D4 set 0 0 1 1 0 0 0 0 Vin>Vou D4 set 0.9375
1 t
0011001 D3 set 0 0 1 1 1 0 0 0 Vin<Vou D3 0.9375
1 t reset
0011001 D2 set 0 0 1 1 0 1 0 0 Vin<Vou D2 0.9375
1 t reset
0011001 D1 set 0 0 1 1 0 0 1 0 Vin>Vou D1 set 0.9772
1 t 5
CONTINUOUS BALANCE DVM OR SERVO
BALANCING POTENTIOMETER TYPE
CONTINUOUS BALANCE DVM OR SERVO
BALANCING POTENTIOMETER TYPE

Input voltage is applied to one side of


mechanical chopper comparator and other
side is connected to variable arm of
precision potentiometer.
The output of chopper comparator is a
square wave whose amplitude is function of
difference in voltage connected to opposite
side of the chopper
CONTINUOUS BALANCE DVM OR SERVO
BALANCING POTENTIOMETER TYPE
Square signal is amplified and difference
signal drives the arm of potentiometer in the
direction needed to make difference voltage
zero.
The servo-motor drives a mechanical
readout, which indication of magnitude of
input voltage.
3 digit:
3 digit:
The number of digit positions used in
digital meter determines the resolution.
3-digit display on DVM for 0-1V range will
indicate values from 0-999mV
The fourth digit capable of indicating 0 or 1
is placed to the left.
It can read values above 999 up to 1999
Resolution of digital meter:
If n= number of full digits, then Resolution(
R)= 1/10^n
Sensitivity of digital meter:
It is the smallest change in input which a
digital meter is able to detect.It is the full
scale value of the lowest voltage range
multiplied by meter’s resolution.
Sensitivity (S)= (fs)min * R
(fs)min= lowest full scale of the meter.
Microprocessor-based ramp type DVM

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