BCA-305 Computer Architecture

Unit 1- Introduction
Dr. Santosh Kumar
Lucknow Public College of
Professional Studies
 General Register Organisation
• General Purpose Register(GPR) can be in
generally 8 to 16 bits.
• Registers are temporary storage units made up
of Integrated Circuits (IC’s) of a computer that
keep data as well as instructions in binary 0 and
1 form.
• ALU performs operation on data stored in
these GPRs and also stores results in these
registers only.
 General Register Organisation
• There are few special purpose address registers.
• Mainly are Program Counter (PC) and Stack Pointer
(SP).
• A special simple ALU can be attached as an address
generation logic performing the simple fixed-point
computations.
• The inputs to the CU are from the IR(Instruction
Register) that contains the operation code of the
instruction to be executed from status register
which help in generating proper control signals on
branch operation.
 General Register Organisation
• The system bus plays the role of communication media.
• There are several intermediate buffer registers also
which help in intermediate storage of information.
• In this organisation of CPU, parallelism can be
implemented within the ALU operation or through the
overlapped operations of data processing and program
CU.
• One of the key differences among various computers is
the difference in their register sets.
• Some computers have very large while some has
smaller sets.
Implementation of Common Bus using MUX
• Common bus organisation is a very efficient method of
interconnecting all the units of Computer System.
• If a large no. of registers are included in processor unit,
common bus system is needed.
• In this organisation, the registers communicate with
each other not only for direct data transfers but also
while performing various micro-operations.
• Acc. To the diag. , 7 registers are used for GPR.
• Output of each register is connected to 2 MUXs inputs.
• 3 select lines are used to select any one of the 7
registers and contents of selected registers are supplied
to the inputs of ALU.
 Implementation of Common Bus using MUX
• The buses A and B are used to form the inputs to
the common ALU.
• The operation to be performed is selected in the
ALU and is used to determine the arithmetic or logic
micro-operation by using function select lines.
• The result of the micro-operation is available as
output data and also goes into the Inputs of all the
registers.
• Any one of the destination register receives the
information from the output bus which is selected
by a decoder.
 Implementation of Common Bus using MUX
• Selector Inputs for CU
• MUX A Selector (SEL A): To place the contents of R1
into bus A
• MUX B Selector (SEL B): To place the contents of R2
into bus B
• ALU operation Selector (OPR): To provide the
arithmetic addition A + B
• Decoder Destinatin Selector ( Sel D): To transfer the
contents of the output bus into R3.
• Control Word: It is a group of binary bits which are
assigned and formatted to perform the specified
operation.
 Stack Organisations
• A stack is an ordered set of elements only one of
which can be accessed at a time.
• Last In First Out (LIFO)
• 2 Operations performed
PUSH and POP
Stack Implementation in 2 ways:
1. Register Stack
2. Memory Stack