Computer Architecture

Lecture – 11
 Microprogrammed Control is an alternative
method to Hardwired Control for generating
control signals.
 In this method, control signal is generated by a
program similar to machine language
program(What is machine language
program?? ---- Discussed in the class)

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 Control Sequence:
 For each instruction, a sequence of control step can be
defined, which is called Control Sequence.
 Control Word:
 A Control Word is a word whose individual bits represent the
various control signals.
 For each of the Control Step of the Control Sequence
corresponding to an instruction, a unique Control Word can
be defined consisting of an unique combination of 1’s and
0’s.

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 Let, Instruction : Add (R3), R1 Control Sequence

 Control signals :
1. PCout, MARin, Read, Select4, Add, Zin
2. Zout, PCin, Yin, WMFC Control Step,
For each of
3. MDRout, IRin which a Control
Word is
4. R3out, MARin, Read determined

5. R1out, Yin, WMFC Control

Signals
6. MDRout, SelectY, Add, Zin
7. Zout, R1in, End
09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET
 Microroutine:
 A Microroutine corresponds to an instruction.
 The sequence of Control Words corresponding to
the control sequence of a machine instruction
constitutes the Microroutine, for that instruction.
 Microinstruction:
 A Microinstruction corresponds to a single control
step of the control sequence which is also called a
Control Word.
09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET
 Microoperation:
 Microoperation corresponds to a single control signal
within a control step.
 So, a sequence of Microoperation constitutes a
Microinstruction and a sequence of
Microinstruction constitutes a Microroutine
corresponding to an instruction.
 Control store:
 Control Store is a special memory within which the
microroutine for all instructions in the instruction set of
a computer are stored.
09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET
 Load locA, R1 1. Fetch Phase
Load locB, R2 Load locB, R2 2. Phase
Add R1, R2 3. Of “Load locA, R2”
4. Constant-Value(locB)out , MARin , Read
5. WMFC
A program consists 6. MDRout , R2in , End.
of 3 instruction The Control Sequence == Microroutine
corresponds to one
instruction of a program

MARin Constant-Value(locB)out , MARin , Read

A Control Step == Microinstruction = Control Word

of the control sequence
A Control Signal == Microoperation
of the control step

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 The responsibility of generating Control Signal
is on the Control Unit.
 In case of microprogrammed Control Signal,
the Control Unit can generate the control
signals for any instruction by sequentially
reading the CWs of the corresponding
microroutine from the Control Store.
 The components of such organization of
Control Unit :
09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET
 IR
 The register where the instruction is loaded before
execution.
 Starting Address Generator
 Every time a new instruction is loaded into IR, the
output of the “Starting Address Generator” block
generates the address of the microroutine and the
output is passed to microinstruction program
counter(PC).

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 Starting
IR Address
Generator

Basic Organization
of microprogrammed
Control Unit
Clock PC

Control Store CW

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 Microinstruction Program Counter(PC)
 PC is used to read the control words sequentially
from the Control Store.
 For a new instruction, the starting address
generator gives the starting address of the
microroutine into PC
 So, after that PC can be automatically
incremented by the Clock.

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

  It causes successive microinstructions to be read
from the control store.
 Hence, the control signals are delivered to various
parts of the processor in the correct sequence.
 One important task of Control Unit cannot be
performed by this simple organization :
▪ The control unit can not check the status of the condition
codes or external inputs to choose between alternative
course of actions.
▪ In Hardwired control unit this situation is handled by an
appropriate logic function in the encoder circuitry.
09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET
 An alternative organization of Control Unit :
 With this alternative approach in
microprogrammed control, branch instruction can
also be handled.
 In addition to branch address, these
microinstructions specify which of the external
inputs, condition codes or, bits of the instruction
register is to be checked as condition for branching
to take place or not.

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 External
Starting and Inputs
branch
IR Condition
Address
Codes
Generator

Organization
of microprogrammed
Control Unit
Clock PC
with provision
for Branching

Control Store CW

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 Now Branch-on-negative instruction can be
implemented by the following routine :
1. PCout, MARin, Read, Select4, Add, Zin
2. Zout, PCin, Yin ,WMFC
3. MDRout, IRin
4. Branch to Starting Address of Appropriate routine
-----------------------------------------------------------------------------------------------------
25. If N = 0, then branch to instruction 0
26. Offset-field-of-IRout, Add, Zin
27. Zout, PCin, End.
09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET
  After loading the Branch instruction into IR, a
branch instruction transfer control to the
corresponding routine, which is here is assumed to
start at location 25 in control store.
 This address is the output of the starting address
generator block.
 The instruction at location 25 tests the N bit of the
condition codes.
 If this bit is equal to 0, a branch takes place to
location 0 to fetch a new machine instruction.
09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET
  Otherwise, the instruction at location 26 is
executed to put the Brach Target Address into
register Z, as in step 4.
 The instruction at location 27 loads this address
into the PC.
 To support this program branching, the
organization of the control unit should be
modified as follows :

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

  The starting Address Generator block becomes the
Starting and Branch Address Generator.
 This block loads a new address into the PC when
a instruction instructs it to do so.
 To allow the implementation of conditional branch,
like the instruction register(IR), two more blocks,
External Inputs and Condition Codes has their
inputs to the Starting and Branch Address
Generator Block.

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 In this Control Unit, the PC is incremented every
time a new instruction is fetched from the program
memory(CS), except in the following situations :
1. When a new instruction is loaded into IR, the PC is
loaded with the starting address of the routine for that
instruction.
2. When a branch instruction is encountered and the branch
condition is satisfied, the PC is loaded with the branch
address
3. When the End instruction is encountered, the PC is
loaded with the address of the first CW in the routine for
the instruction fetch cycle.

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 Now we will define the format of
microinstruction.
 A straight forward way to structure
microinstruction is to assign one bit position to
each control signal.
 This is called Horizontal Organization of
microinstruction.

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 Consider the single-bus organization of the
processor.
 Assume it contains only four General-purpose
registers: R0, R1, R2, R3
 Some of the connections in the processor are
permanently enabled :
 the output of the IR to the decoding circuits.
 Both inputs to the ALU.

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 So, there are total 11 registers: PC, MAR,
MDR, IR, TEMP, Y, Z, R0, R1, R2, R3.
 At the gate of each register, there are normally
two control signals to control the input and
output to/from the register.
 But, MAR and Y has only input connection with
the internal single bus.
 So, total control signals for this in/out of the
registers are : (9  2) + 2 = 20.
09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET
 Control signals for the connections to/from the
registers are called Gating Signal.
 So, according to the configuration of this
processor , there are 20 gating signals.
 Let, the ALU can perform 16 distinct
operations. So, here 16 control signals are
needed.

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 Additional 6 control signals those are needed
are : Read ,Write ,Select (to MUX), End and
continue.
 So, in total 20 + 16 + 6 = 42 control signals are
needed.
 If we assign one bit for each control signal,
then 42 bits would be needed for each
microinstruction.

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 MDR out

WMFC
MAR in

Select
PCout

Read

out

R3out
Micro -

R1 in
PCin

End
Add

Z out
IRin

Yin

Zin

R1
instruction

1 0 1 1 1 0 0 0 1 1 1 0 0 0 0 0 0
2 1 0 0 0 0 0 1 0 0 0 1 0 0 0 1 0
3 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0
4 0 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0
5 0 0 0 0 0 0 1 0 0 0 0 1 0 0 1 0
6 0 0 0 0 1 0 0 0 1 1 0 0 0 0 0 0
7 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1

An example of Horizontal Organization of microinstructions

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 To reduce the length of microinstruction,
another alternative approach of construction
microinstruction is possible, which is called
Vertical Organization.
 Depending on two criteria vertical organization
is done :
1. Most of the signals are not need simultaneously.
2. Many signals are mutually exclusive(can not
occur in a single Control Step at the same time).
09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET
 For example :
 In a control step, only one ALU operations can be
performed.
 So, only one function of the ALU can be activated at
a time.
 The source for a data transfer must be unique
because it is not possible to gate the contents of two
different registers onto the bus at the same.(more
than one OUT is not possible in one control step)

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 Read and Write signals to the memory can not
be performed at the same time in the same
instruction.
 So the signals can be grouped so that all
mutually exclusive signals are placed in the
same group.
 Then, at most one microoperation per group is
specified in any microinstruction.

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 Then a binary coding scheme can be used to
represent one signal from each group.
 For example :
 For 16 ALU operations, 4 bit is enough to specify an
ALU operation.
 All register output control signals can be put in a
single group.
 Most of the group must contain one inactive code
for the case when no action is required.
09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET
 And, when there is no “no action” in a group to
reduce total number of bit then, from that
group don’t care is taken.
 Every microinstruction must have the same
length and it is dependent on , how we group
the control signals.
 According to vertical arrangement, from left
group to right group, one code must be taken
from every group for all microinstructions.
09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET
 Group 1 Group 2 Group 3 Group 4 Group5 Group6 Group 7 Group 8
1 No No No Add No SelectY No Continu
transfer transfer transfer action action e
2 PCout PCin MARin Sub Read Select4 WMFC End
3 MDRout Irin MDRin Mul Write
4 Zout Zin TEMPin .
5 R0out R0in Yin .
6 R1out R1in .
7 R2out R2in AND
8 R3out R3in OR
9 Tempout XOR
10 Offsetout
4 bits(10) 3 bits(8)Sumaiya
09/23/22
3 bits(5) 4 bits(16) 2 bits(3)
Iqbal, Lecturer, CSE, BUET
1 bit(2) 1 bit(2) 1 bit(2)
 An example is given in the above
arrangement.
 In this arrangement 19 bits are required to
represent microinstruction.
 Each of the microinstruction has fixed length :
19 bits.

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 Advantages of Horizontal Arrangement:
1. A very simple way to generate microinstructions
or control word.
2. Less hardware is needed to handle the execution
of microinstructions.
3. The cost of extra circuitry is not needed to encode
and then decode microinstructions.
4. We can get higher operating speed and the
machine structure allows parallel use of resources.
09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET
 Disadvantages of Horizontal Arrangement:
1. Length of each microinstruction is very high.
2. Only few bits are 1 within a microinstruction, so
there is a poor use of storage.
3. To keep this long microinstruction, huge memory
that is, Control Store is needed.
4. The cost of memory to keep microinstruction
increases.

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 Advantages of Vertical Arrangement:
1. Fewer bits are needed for each microinstruction.
2. Proper use of available storage.
3. Size of the Control Store(memory) becomes low.
4. So cost due to memory decreases.

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 Disadvantages of Vertical Arrangement:
1. A little bit complex arrangement for generating
microinstruction.
2. A complex hardware is needed to handle the
execution of microinstructions.
3. The cost of extra circuitry is needed to encode
and then decode microinstructions.
4. The operation speed is lower in this arrangement.

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET

 Zaky
 Chapter 7 : 7.5(7.5.1)
 Class Lecture

09/23/22 Sumaiya Iqbal, Lecturer, CSE, BUET