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02 Gates W
02 Gates W
See: P&H Appendix C.2 and C.3 (Also, see C.0 and C.1)
Goals for Today
From Switches to Logic Gates to Logic Circuits
Logic Gates
• From switches
• Truth Tables
Logic Circuits
• Identity Laws
• From Truth Tables to Circuits (Sum of Products)
Logic Circuit Minimization
• Algebraic Manipulations
• Truth Tables (Karnaugh Maps)
Transistors (electronic switch)
A switch
• Acts as a conductor or
insulator
• Can be used to build
amazing things…
+
Either (OR)
Truth Table
A A B Light
-
OFF OFF
OFF ON
B ON OFF
ON ON
Both (AND)
+ A - A B Light
OFF OFF
OFF ON
B ON OFF
ON ON
Basic Building Blocks: Switches to Logic Gates
Either (OR)
Truth Table
A A B Light
-
OFF OFF
OR OFF ON
B ON OFF
ON ON
Both (AND)
A - A B Light
OFF OFF
AND OFF ON
B ON OFF
ON ON
Basic Building Blocks: Switches to Logic Gates
Either (OR)
Truth Table
A A B Light
-
0 0 0 = OFF
OR 0 1 1 = ON
B 1 0
1 1
Both (AND)
A - A B Light
0 0
AND 0 1
B 1 0
1 1
Basic Building Blocks: Switches to Logic Gates
OR
B
George Boole,(1815-1864)
A B Out
0 0 0
AND: A
0 1 0
B 1 0 0
1 1 1
OR: A
A B Out
0 0 0
B 0 1 1
1 0 1
1 1 1
Logic Gates
• digital circuit that either allows a signal to pass through it or not.
• Used to build logic functions
• There are seven basic logic gates:
AND, OR, NOT,
NAND (not AND), NOR (not OR), XOR, and XNOR (not XOR) [later]
Building Functions: Logic Gates
A Out
NOT: In 0 1
1 0
A B Out
0 0 0
AND: A
0 1 0
B 1 0 0
1 1 1
OR: A
A B Out
0 0 0
B 0 1 1
1 0 1
1 1 1
Logic Gates
• digital circuit that either allows a signal to pass through it or not.
• Used to build logic functions
• There are seven basic logic gates:
AND, OR, NOT,
NAND (not AND), NOR (not OR), XOR, and XNOR (not XOR) [later]
Building Functions: Logic Gates
A Out
NOT: In 0 1
1 0
A B Out A B Out
AND: A
0 0
0 1
0
0
NAND: A
0 0
0 1
1
1
B 1 0 0 B 1 0 1
1 1 1 1 1 0
Logic Gates
• digital circuit that either allows a signal to pass through it or not.
• Used to build logic functions
• There are seven basic logic gates:
AND, OR, NOT,
NAND (not AND), NOR (not OR), XOR, and XNOR (not XOR) [later]
Activity#1.A: Logic Gates
Fill in the truth table, given the following Logic
Circuit made from Logic AND, OR, and NOT gates.
What does the logic circuit do?
a b Out
a
b
Out
Activity#1: Logic Gates
Fill in the truth table, given the following Logic
Circuit made from Logic AND, OR, and NOT gates.
What does the logic circuit do?
a b d Out
0 0 0
0 0 1
0 1 0 a
0 1 1
1 0 0 Out
d
1 0 1
1 1 0
b
1 1 1
Goals for Today
From Switches to Logic Gates to Logic Circuits
Logic Gates
• From switches
• Truth Tables
Logic Circuits
• Identity Laws
• From Truth Tables to Circuits (Sum of Products)
Logic Circuit Minimization
• Algebraic Manipulations
• Truth Tables (Karnaugh Maps)
Transistors (electronic switch)
Next Goal
Given a Logic function, create a Logic Circuit that
implements the Logic Function…
…and, with the minimum number of logic gates
A B Out
0 0 0
AND: A
0 1 0
B 1 0 0
1 1 1
OR: A
A B Out
0 0 0
B 0 1 1
1 0 1
XOR:
1 1 1
A B Out
A 0 0 0
L 0 1 1
B
ogic Equations 1 0 1
A B Out A B Out
AND: A
0 0
0 1
0
0
NAND: A
0 0
0 1
1
1
B 1 0 0 B 1 0 1
1 1 1 1 1 0
XOR:
1 1 1 1 1 0
XNOR:
A B Out A B Out
A 0 0 0 A 0 0 1
L 0 1 1 0 1 0
B B
ogic Equations 1 0 1 1 0 0
Variables: a, b, out, …
Operators (above): AND, OR, NOT, etc.
Logic Equations
NOT:
• out = ā = !a = a
AND:
• out = a ∙ b = a & b = a b
OR:
• out = a + b = a | b = a b
XOR:
• out = a b = a + āb
Logic Equations
• Constants: true = 1, false = 0
• Variables: a, b, out, …
• Operators (above): AND, OR, NOT, etc.
Logic Equations
NOT:
• out = ā = !a = a
AND: NAND:
• out = a ∙ b = a & b = a b • out = = !(a & b) = (a b)
OR: NOR:
• out = a + b = a | b = a b • out = = !(a | b) = (a b)
XOR: XNOR:
• out = a b = a + āb • out = = ab +
Logic Equations
• Constants: true = 1, false = 0
• Variables: a, b, out, …
• etc.
• Operators (above): AND, OR, NOT, .
Identities
Identities useful for manipulating logic equations
– For optimization & ease of implementation
a+0=
a+1=
a+ā=
a∙0 =
a∙1 =
a∙ā =
Identities
Identities useful for manipulating logic equations
– For optimization & ease of implementation
a+ab =
a(b+c) =
=
Logic Manipulation
• functions: gates ↔ truth tables ↔ equations
• Example: (a+b)(a+c) = a + bc
a b c
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Takeaway
Binary (two symbols: true and false) is the basis of
Logic Design
a
0
b
0
c
0
out
0
Sum of minterms yields?
0 0 1 1 out =
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 0
Minimization with Karnaugh maps (2)
a
0
b
0
c
0
out
0
Sum of minterms yields?
0 0 1 1 out =
0 1 0 0
0 1 1 1
1 0 0 1 Karnaugh maps identify
1 0 1 1 which inputs are (ir)relevant
1 1 0 0
1 1 1 0
to the output
ab
c 00 01 11 10
0 0 0 0 1
1 1 1 0 1
Minimization with Karnaugh maps (2)
a
0
b
0
c
0
out
0
Sum of minterms yields?
0 0 1 1 out =
0 1 0 0
0 1 1 1
1 0 0 1
Karnaugh map minimization
1 0 1 1
1 1 0 0
Cover all 1’s
1 1 1 0 Group adjacent blocks of 2n
ab 1’s that yield a rectangular
c 00 01 11 10
shape
0 0 0 0 1 Encode the common features
1 1 1 0 1 of the rectangle
out = ab + ac
Karnaugh Minimization Tricks (1)
ab
c 00 01 11 10
Minterms can overlap
0 0 1 1 1 out =
1 0 0 1 0
ab
c 00 01 11 10
0 1 1 1 1 Minterms can span 2, 4, 8
1
or more cells
0 0 1 0 out =
Karnaugh Minimization Tricks (2)
ab
cd 00 01 11 10
00 0 0 0 0 The map wraps around
01 1 0 0 1 • out =
11 1 0 0 1
10
0 0 0 0
ab
cd 00 01 11 10
00 1 0 0 1
01 0 0 0 0 • out =
11 0 0 0 0
10
1 0 0 1
Karnaugh Minimization Tricks (3)
ab
cd 00 01 11 10
00 0 0 0 0 “Don’t care” values can be
01 1 x x x interpreted individually in
11
whatever way is convenient
1 x x 1 • assume all x’s = 1
10
0 0 0 0 • out =
ab
cd 00 01 11 10
00 1 0 0 x
01 0 x x 0
11 0 x x 0 • assume middle x’s = 0
10 • assume 4th column x = 1
1 0 0 1
• out =
Multiplexer
A multiplexer selects
a between multiple inputs
b • out = a, if d = 0
d • out = b, if d = 1
a b d out
0
0
0
0
0
1
Build truth table
0 1 0 Minimize diagram
0 1 1
1 0 0 Derive logic diagram
1 0 1
1 1 0
1 1 1
Takeaway
Binary (two symbols: true and false) is the basis of
Logic Design
VG VG = VSupply VG
VG = 0 V VG = VSupply VG = 0 V
VS = 0 V VD VD = Vsupply
G G
G= 1 G= 0 G= 1 G= 0
S = 0V D D= 1
Closed switch Closed switch
When VG = Vsupply When VG = 0 V
• Connect source to drain Connect source to drain
when gate = 1 when gate = 0
• N-channel transistor P-channel transistor
VS: voltage at the source
VD: voltage at the drain
Vsupply: max voltage (aka a logical 1)
(ground): min voltage (aka a logical 0)
Inverter
Vdd = hi
• Function: NOT
A out A = 0
• Called an inverter
• Symbol:
Vss = gnd
in out
Truth table
NAND Gate
Vdd Vdd
• Function: NAND
A B • Symbol:
out a
out
B b
A B out Vss
0 0 1
1 0 1
0 1 1
1 1 0
NOR Gate
Vdd
• Function: NOR
A • Symbol:
B a
out
b
out
A B
Vss Vss
A B out
0 0 1
1 0 0
0 1 0
1 1 0
Building Functions (Revisited)
NOT:
AND:
OR:
a
AND:
b
OR: a
b
http://www.theregister.co.uk/2010/02/03/intel_westmere_ep_preview/
in out d out
b
Vss
a
d out
in out
b