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EI5007W1D2
EI5007W1D2
1
Outlines of Presentation
- Objectives
- JFET
- References
2
Objectives
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Junction Field Effect Transistor
- three terminals (Gate, Drain, Source )
- mode –depletion
- type – n-channel (negative charges) ,p- channel (positive charges)
- voltage controlled device (VGS control ID)
- unipolar
- channel – current path between two terminals which may be either a P-type or N-type material
- The control of current flowing in this channel is achieved by varying the voltage applied to the Gate
- biasing – to be formed depletion layer whose width increase the bias
- reverse bias – N channel (gate – negative)
- P channel (gate – positive)
4
Continued;
- operation regions – ohmic – VGS = 0, depletion region is very small ,
- pinched-off –called as cutoff region, channel closes
- saturation -acts as a good conductor
- breakdown - drain to source voltage (VDS) is high enough, uncontrolled maximum
current passes through the device
5
Continued;
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References
(1) https://www.electronicshub.org/fet-as-a-switch/
(2) https://www.electronics-notes.com/articles/electronic_components/fet-field-effect-transistor/jfet-junction-basi
cs.php
(3) https://byjus.com/physics/junction-field-effect-transistor/