Special Function

Registers
• Above 7FH, there is another
block of memory 80H to 0FFH
in all the version of MCS51
uP
• this 128 bytes of memory are
reserved for Special Function
Register (SFR). There are 21
SFRs.
 SFRs
• SFR are usually addressed by name
• Memory location 0F0H is given a name
called Register B, similarly 80H is
called P0.
• Not all memory location has a name
– memory location 35H has no name
• Some locations between the SFRs have no
names as well e.g. 91H. Such locations
should not be used to store any data.
If you do it then your data may be
lost.
• Some important or commonly used SFRs
will be discussed while others will be
explained when you need to use them in
your projects.
 Commonly used SFRs
• Accumulator, it has two names, A
and ACC. Many instruction make
use of the accumulator, eg: mov
A,R0, push acc
• SP, always pointing to the top of
the stack, increasing by 1 before
write to stack, decreasing by 1
after read from stack
 Fig 3-0 B Input/Output
Pin Configuration
1
P1.0 VCC
40
(I/O) Ports
2
P1.1 AD0 P0.0
39
• In the SFR, register P0,
3 38
4
P1.2 AD1 P0.1
37 P1, P2, P3 are connected
P1.3 AD2 P0.2
5
P1.4 AD3 P0.3
36 to the physical pin on
6 35
P1.5 AD4 P0.4 the uP. Some of the Port
7
8
P1.6
P1.7
80C31 AD5 P0.5
AD6 P0.6
34
33 pin serve an alternative
9
RST AD7 P0.7
32
function
10 31
P3.0 RXD EA/VPP
11
P3.1 TXD ALE/PROG
30 PORT 0
12
P3.2 INT0 PSE
29 addressed by name PO, individual pin
13 28
P3.3 INT1
N
A15 P2.7 P0.0 to P0.7
14 27
15
P3.4 T0 A14 P2.6
26
PORT 1
16
P3.5 T1 A13 P2.5
25 addressed by name P1, individual pin
17
P3.6 WR A12 P2.4
24 P1.0 to P1.7
P3.7 RD A11 P2.3
18 23
XTAL2 A10 P2.2 PORT 2
19 22
XTAL1 A9 P2.1 addressed by name P2, individual pin P2.0
20 21
VSS A8 P2.0 to P2.7
PORT 3
addressed by name P3, individual pin P3.0 to
P3.7
 Accessing External Code
Memory
• If the design involves external code
memory, both P0 and P2 should not be
used as general purpose I/O since P2 is
now the Higher address bus while P0 is
the multiplexed Lower address bus and
the data bus.

_____
• As stated earlier, the PSEN pin must be
used. See fig 2-9
FIGURE 2–8 Multiplexing the address bus (low-byte) and data bus
FIGURE 2–9 Accessing external code memory