This document discusses asynchronous and synchronous counters. It provides information on asynchronous 2-bit up and down counters using positive edge triggered flip flops. It also discusses the design of asynchronous counters using J-K flip flops and synchronous 3-bit up and down counters using J-K flip flops. The document defines a counter's modulus as the number of states it passes through before returning to the starting state.
This document discusses asynchronous and synchronous counters. It provides information on asynchronous 2-bit up and down counters using positive edge triggered flip flops. It also discusses the design of asynchronous counters using J-K flip flops and synchronous 3-bit up and down counters using J-K flip flops. The document defines a counter's modulus as the number of states it passes through before returning to the starting state.
This document discusses asynchronous and synchronous counters. It provides information on asynchronous 2-bit up and down counters using positive edge triggered flip flops. It also discusses the design of asynchronous counters using J-K flip flops and synchronous 3-bit up and down counters using J-K flip flops. The document defines a counter's modulus as the number of states it passes through before returning to the starting state.
known as ripple counter Asynchronous 2 bit up counter using positive edge triggered flip flop Asynchronous 2 bit down counter using positive edge triggered flip flop 3 bit asynchronous counter (UP) using J-K flip flop Design of Asynchronous Counter The number of states through which the counter passes before returning to the starting state is called modulus of counter Modulus of counter is total number of states. 2 bit counter has 4 states so it is called mod-4 counter It is also called divided by 4 counter. Design and implement mod-6 asynchronous counter using T FFs Design and implement mod-10 asynchronous counter using T FFs Design of Synchronous Counter The number of flip flop State Diagram Types of flip flop & Excitation table Logic Equation The logic diagram Design of Synchronous 3 bit UP Counter using J-K flip flop Design of Synchronous 3 bit DOWN Counter using J-K flip flop Design of modulo-9 sync counter using T FFs Design T type counter that goes through state 0,3,5,6,0 Design D type counter that goes through 0,1,2,4,0. Unused state must always go to 000