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EEE 342 09 Timer 8254
EEE 342 09 Timer 8254
EEE 342 09 Timer 8254
Interfacing
EEE 342
Pin configuration
Architecture
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Why need a timer/counter in computer
We need precise timing in many real time
applications like
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Why need a timer/counter in computer
CPU works at crystal oscillator pulse, But it is
too fast for peripheral devices like ADC etc..
Then use the software delay routines
Using delay routines is not a good option because it
will keep the CPU busy. They are flexible
(programmable) but not very accurate
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8254 timer/counter
The Intel 8254 is a peripheral counter/timer device
designed to solve the common timing control problems in
microcomputer system design.
Features
It provides three independent 16-bit counters, each
Microprocessors
The 8254 is a programmable interval timer/counter
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8254 timer/counter
The Intel 8254 is a counter/timer device designed to
solve the common timing control problems in
microcomputer system design.
Features
Counters are 16 bit counters
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Internal Architecture of 8254
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Pinout of 8254 Timer/Counter
D0 CLK0 D7-D0 (pins 1 – 8) I/O DATA: Bi-directional three
. .
. . GATE0
state data bus lines, connected to system data bus.
. .
D7 OUT0 WR-Bar (pin 23) Input. WRITE CONTROL: This
CLK1 input is low during. CPU write operations.
WR RD-Bar (pin 22). READ CONTROL: This input is
RD GATE1 low during CPU read operations.
CS OUT1
CS-Bar (pin 21) Input. CHIP SELECT-Bar: A low on
CLK2 this input enables the 8254 to respond to RD and
GATE2 WR signals. RD and WR are ignored otherwise.
A1
A0 A1, A0 (pin 20 – 19) Input ADDRESS: Used to select
OUT2 one of the three Counters or the Control Word
Register for read or write operations. Normally
8254 Timer/Counter connected to the system address bus.
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Pinout of 8254 Timer/Counter
D0 CLK0 CLK 0 (pin 9) Input CLOCK 0: Clock input of Counter 0.
. .
. . GATE0 OUT 0 (pin 10) OUTPUT 0: Output of Counter 0.
. . GATE 0 (pin11) I GATE 0: Gate input of Counter 0.
D7 OUT0
CLK1
WR CLK 1 (pin15) Input CLOCK 1: Clock input of Counter 1.
RD GATE1 GATE 1 (pin 14) Input GATE 1: Gate input of Counter 1.
OUT 1 (pin 13) OUT 1 O OUT 1: Output of Counter 1.
CS OUT1
8254 Timer/Counter
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Pinout of 8254 Timer/Counter
D0 CLK0
. .
. . GATE0
. . GND (pin12) GROUND: Power supply connection.
D7 OUT0 VCC (pin 24) POWER: A 5V power supply connection.
CLK1
WR
RD GATE1
CS OUT1
CLK2
A1 GATE2
A0
OUT2
8254 Timer/Counter
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Pinout of 8254 Timer/Counter
D0 CLK0 Depending upon the value of CS, A1 and A0 we can
. . determine addresses of selected counter.
. . GATE0
. .
D7 OUT0
CLK1
WR
RD GATE1
CS OUT1
CLK2
A1 GATE2
A0
OUT2
8254 Timer/Counter
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8254 Interfacing with 8088
CPU D0 D0 CLK0
.
CPU . .
.
Data . . GATE0
bus . . .
D7 D7 OUT0
CLK1
A2 CPU WR WR
CPU A3 lines RD RD GATE1
Address A4
bus CS OUT1
A5
A6 CPU A1 A1 CLK2
A7 Address
IO/M’ lines A0 A0 GATE2
OUT2
Control word Register
Each counter is individually programmed by writing
control word followed by initial count
7 6 5 4 3 2 1 0
Modes
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Control word Register
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Modes of Operation
The 8254 timer can operate in different modes according
to the requirement
There are six operating modes
Each mode works with CLK input, the GATE (G) control
signal and OUT signal
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Mode 0
Mode 0: *(Interrupt on terminal count) Used to generate
Interrupt on terminal count.
The output OUT becomes a logic 0 when the control
word is written - and remains there until N +1 number of
programmed counts
Gate G must be logic 1 to allow counter to count, If G
become zero in middle, counter will stop working and will
restart once the Gate is high
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Mode 1 (HW triggered/Programmable one shot)
OUT will be initially high. OUT will go low on the CLK pulse
following a trigger to begin the one-shot pulse at gate, and will
remain low until the counter reaches zero.
1) Load the count register
2) A pulse , 0-to-1, must be sent to the GATE input to trigger the count.
3) In Mode 1, after sending the 0-to-1 pulse to GATE, OUT becomes low
and stays low for a duration of N*T, then becomes high and stays high
until the GATE is triggered again.
4) If during the activation, a retriggered happened, then restart the down
counting .
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Mode 2
Mode2 allows generation of continuous Pulse
Mode 2: Rate Generator (Divide-by-N counter)
In Mode2, if GATE=1, OUT will be high for (N-1)*T, goes low only for
one clock pulse, then counter is reloaded automatically,
The cycle is repeated until reprogrammed or G pin set to 0.
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Mode 3
Mode 3: Square wave rate generator
Mode3 allows generation of continuous square wave
Mode 3: Generates a continuous square-wave with G set to 1.
if count is even, 50% duty cycle otherwise OUT is high 1 cycle
longer
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Mode 4
Mode 4: Software triggered strobe
In Mode4, if GATE=1, the output will go high when loading the
count, it will stay high for duration N*T.
After the count reaches zero, it becomes low for one clock pulse,
then goes high again and stays high until a new command word or
new count is loaded
It produces a single pulse at output. To repeat the strobe, the count
must be reloaded
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Mode 5
Mode 5: Hardware triggered strobe
Similar to Mode4, except that the triggering must be done with the
GATE input
The count starts only when a pulse is sent to the GATE input
If GATE retriggered during the counting, it will restart the down
counting
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Example
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Example
(a). Suppose a 8254 time works at 10 MHz, and counter is loaded
with 100. Draw the output if the gate is triggered at 0 time.
(b) What will the output if the gate is triggered at time at after every 50
micro seconds
Solution
(a). Since the gate is triggered at time 0, output will zero
for (100* (1/10MHZ)) time
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Example
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Example
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Example
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Example
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Example
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Control word Register
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Example
Example Write instruction for 1KhZ square wave at Ctr
1. Input Frequency = 2MHz, Control Register address = 83H, C1 = 81H
Control word = 76H
D7 D6 D5 D4 D3 D2 D1 D0
SC1 SC2 RW1 RW0 M2 M1 M0 BCD
01 Load 16 bit (11) 011 (mode 3) 0
D3D2D1=010 mode 2
D0=0 Binary
Instructions
MOV Al,99H ; load Control word for Ctr 1 mode 3
OUT 83H,Al ; write to Ctrl reg
MOV Al, 09H; lower order byte cnt
OUT 81H, Al
HLT
RESULT= It will produce a pulse with length 10 U sec. 9 us
high and 1 us low