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Chapter 3
Chapter 3
Addressing
Modes
prepared by
Dr: Mohamed EL-Bouridy Dr : Reda EL-Sheshtawy
mohamed.elbouridy@aiet.edu.eg RedaSheshto66@gmail.com
Chapter
Register Addressing
Overview
Immediate Addressing
Direct Data Addressing
Register Indirect Addressing
Base-Plus-lndex Addressing
Register Relative Addressing
Base Relative-Plus-lndex Addressing
Program memory Addressing Modes
Memory Organization
Introduction
Efficient software development for the microprocessor
requires a complete familiarity with the addressing
modes employed by each instruction
The MOV (move data) instruction is used to describe the
data-addressing modes.
The MOV instruction transfers bytes or word of data
between registers and memory in 8086 ….80286, words
or doublewords in 80386 and above.
MOV AX , BX
Destination Source
Data-Addressing Modes
Transfers a copy of a byte or word from
Register
the source register or memory location
addressing
to the destination register or memory
mode
location.
MOV AX, BX
Register Register
BX AX
Source Destination
Register Addressing
• Register addressing is the most common form of data
addressing and, once the register names are learned,
it is the easiest to apply.
Data Register
3AH CH
Source Destination
Immediate Addressing
• The term immediate implies that the data immediately
follow the hexadecimal code in the memory. Also note
that immediate data are constant data, while the data
transferred from a register are variable data.
MOV [1234H], AX
Memory
Register DS×10H+DISP
1000×10H+1234H address
AX
11234H
Source Destination
Direct Data Addressing
• Direct addressing with a MOV instruction transfers
data between a memory location, located within the
data segment, and the AL (8-bit), AX (16-bit), or EAX
(32-bit) register.
• Examples of the Direct addressed instructions.
Assembly Language Size Operation
MOV CH, DOG 8-bits Copies the byte contents of data segment
memory location DOG into CH
MOV CH, [1000H] 8-bits Copies the byte contents of data segment
offset address 1000HintoCH
MOV ES, DATA6 16-bits Copies the word contents of data
segment memory location DATA6 into ES
MOV DATA7, BP 16-bits Copies BP into data segment memory
location DATA7
MOV NUMBER, SP 16-bits Copies SP into data segment memory
location NUMBER
MOVDATA1, EAX 32-bits Copies EAX into data segment memory
location DATA1
MOV EDI, SUM1 32-bits Copies the doubleword contents of data
segment memory location SUM1 into EDI
Direct Addressing Example :
MOV AL, [1234H]
MOV [BX], CL
Memory
Register DS×10H+BX
1000×10H+0300H address
CL
10300H
Source Destination
Register Indirect Addressing
• Register indirect addressing allows data to be addressed at any
memory location through an offset address held in any of the following
registers: BP, BX, DI, and SI.
MOV [BX+SI], BP
Memory
Register DS×10H+BX+SI
1000×10H+0300H+0200 address
BP
H 10500H
Source Destination
Base-Plus-lndex Addressing
• Base-plus-index addressing is similar to indirect
addressing because it indirectly addresses memory data.
• In the 8086 through the 80286, this type of addressing
uses one base register (BP or BX), and one index register
(DI or SI) to indirectly address memory.
MOV CL,[BX+04H]
Memory
DS×10H+BX+4H Register
address 1000×10H+0300H+04H CL
10304H
Source Destination
Register Relative Addressing
• Register relative addressing is similar to base-plus-
index addressing and displacement addressing. In
register relative addressing, the data in a segment of
memory are addressed by adding the displacement
to the contents of a base or an index register (BP,
BX, Dl, or SI).
• Examples of the register Relative addressed instructions.
Assembly Language Size Operation
MOV AX, [DI+100H] 16-bits Copies the word contents of the data segment
memory location addressed by Dl plus 100H
into AX
MOV ARRAY[SI], BL 8-bits Copies BL into the data segment memory
location addressed by ARRAY plus SI
MOV LIST[SI+2], CL 8-bits Copies CL into the data segment memory
location addressed by sum of LIST, SI, and 2
MOV DI,SET_IT[BX] 16-bits Copies the word contents of the data segment
memory location addressed by the sum of
SET_IT and BX into Dl
MOV ARRAY[EBX],EAX 32-bits Moves EAX into the data segment memory
location addressed by the sum of ARRAY and
EBX
Register Relative Addressing
MOV AX, [BX + 1000H]
MOV ARRAY[BX+SI],DX
Memory
Register DS×10H+ARRAY+BX+SI
address
DX 1000×10H+1000H+0300H+0200H
11500H
Source Destination
Base Relative-Plus-lndex Addressing
MOV DH, [BX+DI+20H] 8-bits Copies the byte contents of the data
segment memory location
addressed by the sum of BX, Dl,
and 20H into DH.
MOV AX, FILE[BX+DI] 16-bits Copies the word contents of the data
segment memory location
addressed by the sum of FILE, BX,
and Dl into AX.
MOV [EBX+2×ESI],AX
Memory
Register DS×10H+EBX+2×ESI
address
AX 1000×10H+00000300H+2×00000200H
10700H
Source Destination
Program memory-
Addressing Modes
Program memory-Addressing Modes
Direct Used with JMP, and CALL instructions in
program low level language , Also used with GOTO,
memory and GOSUP instructions in high level
addressing language.
JMP [10000H]
Go directly to a memory location
CS×10H+IP
1000H×10H+0000H
JMP [2]
JMP AX
As shown in figure
Stack memory addressing modes
Stack memory addressing modes
Stack memory addressing modes
Memory Organization
BHE 16-bit
FFFE FFFF
EN
8-bit A8
A0 EN
A15 Address
A7 Even byte Odd byte
Address Lower byte Higher byte
8086 P D0 D7 D8 D 15
Data Bus
AX 07 AB
BX 9A 24
Even Odd
Example : The initial values of 8086 P registers
are shown, the memory is
AX = AB07 BX = 249A CX = 9A20
DX = 0200 IP = 00A0 CS = 0100
SS = B000 SP = 0108 DS = 8000
Lower Higher
Solution : (B)
The memory location in stake memory =SSx10H+SP
=B0000H+ 0108H=B0108H
(1) PUSH CX
(2) PUSH BX EVEN ODD
B0108 B0109
PUSH CX B0106 20 B0107 9A
PUSH BX B0104 9A B0105 24
B0102 B0103
B0100 B0101
Lower Higher
(3) POP DX
EVEN ODD
B0108 B0109
B0106 20 B0107 9A
POP DX B0104 9A B0105 24
B0102 B0103
B0100 B0101
Lower Higher
Solution :
The number of IC’s required=
= = 8 IC’s
Memory Bank 4Kx16-bit
Decoder
2x4
Demultiplex
A0 A0
A15 A15
Y0 CS CS
A10
Y1
Y2
A11
A0
Y3
A15
CS A0
A15
CS
1K (memory capacity) = 1024 = 210
4K (memory capacity) = 4096 = 212
Then the decoder is (2x4)
Memory Bank 4Kx8-bit
Decoder
2x4
Demultiplex
A0 A0
A7 A7
Y0 CS CS
A10
Y1
Y2
A11
A0
Y3
A7
CS A0
A7
CS
1K (memory capacity) = 1024 = 210
4K (memory capacity) = 4096 = 212
Then the decoder is (2x4)
Example : Design a memory bank of 1024x16,
where the available memory is 128x 8bit?
Solution :
The number of IC’s required=
= = 16 IC’s