22EC1202- Computer Organization & Architecture

AY 2022-2023 EVEN

CO1: D2

Course Instructor ID: 4738

Selvakumar.r
AP/ECE
ECE Department, KLEF
 22EC1202- Computer Organization & Architecture

K L -F E D
Syllabus :
CO1: Computer Architecture, Computer system and its sub modules: State Diagram various Architectures, Moore Machine,
Mealey Machine, Van Neuman architecture and hardware implementation of Arithmetic and Logic Unit, BusesTypes,
Specifications of a computer, Concepts of Machine level programming, Assembly level programming and High-level
programming.Various addressing modes and designing of an Instruction set. Concepts of subroutine and subroutine call, use of
stack for handling subroutine call and return.
CO2: CPU design: Introduction to CPU design,Instruction interpretation and execution,Micro-operation and their RTL
specification.Hard wired control CPU design. Micro programmed control CPU design.Concepts of semi conductor memory,CPU
memory interaction, organization of memory modules.Cache memory and related mapping and replacement policies. Virtual
memory, paging concepts, VAS to PAS and Vice-versa mapping.

CO3:Input / Output Devices: Introduction to input/output processing, working with video display unit and key board and routine to
control them. Program controlled I/O transfer. Interrupt Controlled I/O transfer, DMAcontroller. Secondary storage and type of
storage devices.

CO4: Introduction to buses and connecting I/O devices to CPU and memory, TRAP and Interrupts. Pipelining: Introduction to
RISC and CISC paradigm. Design issues of a RISC processor and example of an existing RISC processor.Introduction to
pipelining and design issues of pipeline architecture.Introduction to parallel computing.

TextBooks:1.WilliamStallings,Computer Organization and Architecture:Designing for Performance,8/e,Pearson Education

India .2010.2.D.A. Pattersonand J. L.Hennessy, Computer Organization and Design, 4/e, Morgan Kaufmann, 2008.
ReferenceBooks:1.V.C.Hamacher,Z.G.VranesicandS.G.Zaky,Computer Organization, 5/e,McGraw Hill, 20022.MorrisMano,
Computer System Architecture, 3/e, Pearson, 2008.Web References

KLEF (Deemed to be University), Dept. of E.C.E

 Koneru Lakshmaiah Education Foundation
22EC1202- Computer Organization & Architecture

K L -F E D

CO1: D2

1) Von Neuman architecture ( 10 minutes)

2) Hardware implementation of Arithmetic and Logic Unit
( 40 minutes )
3) Buses Types ( 10 minutes )
4) Specifications of a computer ( 20 minutes)
5) ALM-2 ( 20 minutes )

KLEF (Deemed to be University), Dept. of E.C.E

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Recap of Computer Hardware Architecture

Growth in processor performance over 40 years
Recap of Computer hardware specifications and
its identifications

Source: Hennessy
Recap of Computer hardware specifications and its
identifications

Source: https://www.techcenturion.com/intel-10th-generation
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Evolution of Processor
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Computer Organization | Von Neumann architecture

Historically there have been 2 types of Computers:

• Fixed Program Computers – Their function is very specific, and they

couldn’t be reprogrammed, e.g., Calculators.

• Stored Program Computers – These can be programmed to carry out

many different tasks, applications are stored on them, hence the name.
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Computer Organization | Von Neumann architecture

 Architecture of Micro computer

 Architecture of a micro computer or a micro controller refers to the arrangement of

the CPU with respect to the RAM and ROM.
 There are two types of digital computer architectures that describe the functionality
and implementation of computer systems.
.
1. Von Neumann architecture 

2. Harvard architecture
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Von Neumann Architecture:

Von Neumann Architecture is a digital computer

architecture whose design is based on the concept of

stored program computers where program

data and instruction data are stored in the same
memory. This architecture was designed by the famous
mathematician and physicist John Von Neumann in
1945.

Note: Datas and instructions are stored in same memory

limitation: CPU cannot do both things together (read the instruction and read/write data)
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In a normal computer that follows von Neumann architecture,

instructions and data both are stored in the same memory. So
same buses are used to fetch instructions and data. This means
the CPU cannot do both things together (read the instruction
and read/write data).
Harvard Architecture: 

Harvard Architecture is the digital computer architecture

whose design is based on the concept where there are
separate storage and separate buses (signal path) for
instruction and data. It was basically developed to
overcome the bottleneck of Von Neumann Architecture.

Note : Separate buses for instruction and data

CPU can access instructions and read/write data at the same time. 
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Von Neumann Architecture Vs Harvard architecture

 Von Neumann Architecture Vs Harvard architecture

VON NEUMANN ARCHITECTURE HARVARD ARCHITECTURE

It is ancient computer architecture based on stored It is modern computer architecture based on Harvard
program computer concept. Mark I relay based model.

Same physical memory address is used for instructions Separate physical memory address is used for
and data. instructions and data.

Separate buses are used for transferring data and

There is common bus for data and instruction transfer.
instruction.

Two clock cycles are required to execute single

An instruction is executed in a single cycle.
instruction.

It is cheaper in cost. It is costly than Von Neumann Architecture.

CPU can not access instructions and read/write at the CPU can access instructions and read/write at the same
same time. time.

It is used in personal computers and small computers. It is used in micro controllers and signal processing.
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Von Neumann Architecture Vs Harvard architecture

Point of
Harvard Architecture
Comparison
In Harvard architecture, the CPU is
connected with both the data memory
(RAM) and program memory (ROM),
separately.
Von Neumann Architecture
In Von-Neumann architecture, there is no
separate data and program memory. Instead,
a single memory connection is given to the
CPU.

Arrangement
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Von Neumann Architecture Vs Harvard architecture
Point of
Harvard Architecture Von Neumann Architecture
Comparison
It requires more hardware since it will be It requires less hardware since only a
Hardware requiring separate data and address bus for common memory needs to be reached.
requirements each memory.
Space requirements It requires more space. It requires less space.
Speed of execution is faster because  the Speed of execution is slower since it cannot
processor fetches data and instructions fetch the data and instructions at the same
Speed of execution simultaneously . time.

Controlling becomes complex since data Controlling becomes simpler since either
Controlling and instructions are to be fetched data or instructions are to be fetched at a
simultaneously. time.
COA-Essential components (Terminologies )

1 minute summary
 COA-Essential components (Terminologies )

Introduction to x86 architecture.

Instruction set architecture of a CPU: Registers, instruction execution cycle, RTL Interpretation of
instructions, addressing modes, instruction set.

CPU Control unit design: Hardwired and micro-programmed design approaches

8085 Microprocessor Architecture
 Functional units of 8085
1. Registers: These are nothing but set of flip flops. These are basically used to hold (store) the data.

 General purpose registers–  8085 microprocessors contain 6 general purpose registers that are present
inside the microprocessor and stores 8-bit data in order to execute a program.
 These general-purpose registers are B, C, D, E, H and L. These registers can be combined to form pairs –
BC, DE and HL in order to execute the 16-bit operation.

 Temporary registers: These registers are used by the ALU to store the data on temporary basis and these
are not accessed by the programmer. These are of 2 types:

1. Temporary data register – It is an 8-bit register that holds the operand and provides it to the ALU
for
program execution. Also, the immediate results are stored by the ALU in this register.
2. W and Z register – These registers are also used to hold the temporary values. It is used by the
control section of the microprocessor so as to store the data during operations.
 Functional units of 8085
2. Program Counter (PC):
 It is basically a special purpose register that is used to store the memory location of the instruction to be
performed. As in order to fetch an instruction from the memory the microprocessor needs to know about its
address.
 It is a 16-bit register as it stores address.
 This register is used by the microprocessor to line up the instructions that are to be executed in a sequential
manner.
3. Stack Pointer (SP):
 It is also a 16-bit register and is a part of memory.
 The data is stored in the stack in serial format and stack pointer generally stores the address of the last
data element stored in the stack. Thus, the stack is based on LIFO.
 Whenever a new data is added in the stack, then the stack pointer starts pointing towards the very next
memory location.
 Functional units of 8085

4. Accumulator:
 It is an 8-bit register that stores the result of the operation performed by the ALU.
 It is also known as register A.

5. Flags:
 Flag register basically holds the status of the current result generated by the ALU and not
the actually generated result. Thus we can say it is used to test the data conditions.
 8085 has 5 flags that shows 5 different data conditions. These are carry, sign, zero,
parity and auxiliary carry flags.
 Arithmetic & Logical Unit
• Consider an ALU which can perform four arithmetic operations and four logical
operations To distinguish between arithmetic and logical operation, we may use a
signal line,
• 0 - in that signal, represents an arithmetic operation and
• 1 - in that signal, represents a logical operation.
Block Diagram of the ALU
Design of the ALU
 Buses

Three types of bus are used.

• Address bus - carries memory addresses from the processor to other components
such as primary storage and input/output devices.
• Data bus - carries the data between the processor and other components.
• Control bus - carries control signals from the processor to other components.
Buses
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Hardware implementation of Arithmetic and Logic Unit

 Koneru Lakshmaiah Education Foundation
22EC1202- Computer Organization & Architecture

K L -F E D

Upcoming topic

Concepts of Machine level programming, Assembly level

programming and High-level programming

KLEF (Deemed to be University), Dept. of E.C.E

Koneru Lakshmaiah Education Foundation E .C .E Robotics and Automation

All the best

KLEF (Deemed to be University), Dept. of E.C.E