Professional Documents
Culture Documents
IO Analysis
IO Analysis
IO Analysis
I/O Analysis.
Interface Design & Practice
Session 3
2
TC Point Signa LC Block Slot Point Signa LC Block Slot
AC l l
Interlocking
Vital Input Bits Vital Output Bits
N/Vital Input Bits N/Vital Output Bits UCR, ASR, UYR : Internal Bits
_N _Z _KE
Data Interface
Panel Panel
Switches Indications/
Buttons Buzzers 3
Circuit Progression
Taticherla SIP
Sn Function Vital Input Bits Vital Output Bits
1 Stop Signal with Route RECR 4 HR 3
(3 Aspect ) HECR DR
DECR UGR
UECR
2 Stop Signal without Route RECR 3 HR 2
(3 Aspect) HECR DR
DECR
3 Stop Signal without Route RECR 2 HR 1
(2 Aspect) HECR
12B
12BT
Sn Function Non-Vital Input Bits Non-Vital Output Bits
11 Point WN 1 A_NWK_W 17
(Double End) B_NWK_W
A_NWK_R
B_NWK_R
A_RWK_W
B_RWK_W
A_RWK_R
B_RWK_R
A_CKW_W
B_CKW_W
A_CKW_R
B_CKW_R
BT_NK_W
BT_NK_R
AT_NK_W
AT_NK_R
WFK_W/WLK
Sn Function Non-Vital Input Bits Non-Vital Output Bits
12 Crank Handle CHN 1 CHK_W 3
CHK_R
CHK_F
13 Track Circuit - 0 TWKE 2
TRKE
14 Axle Counter - 0 Clear_KE 2
Occ _KE
15 LC Gate LXN 1 LXKWE 3
LXKRE
LXFKE
16 Key Control SM Key 1 SM_KEY_KE 1
Sn Function Non-Vital Input Bits Non-Vital Output Bits
17 Emergency Key EWWN Key 1 EWWN_KEY_KE 1
20