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University Institute of Engineering

DEPARTMENT OF COMPUTER SCIENCE


& ENGINEERING
Bachelor of Engineering (Computer Science & Engineering)
Subject Name: Computer Organization & Architecture
Subject Code: CST-252/ITT-252

CPU ORGANIZATION(SINGLE
ACCUMULATOR &GENERAL DISCOVER . LEARN . EMPOWER
REGISTER BASED)
CHAPTER 3: COMPUTER
ORGANIZATION
• Topics to be covered:

• Computer Organization

• CPU Organization

• Single Accumulator based organization

• General register based organization

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LECTURE-3.1
INTRODUCTION
• COMPUTER ORGANIZATION
Computer organization is concerned with the way the hardware components operate and the way they are connected
together to form the computer system.
• CPU(Central Processing Unit) performs the following tasks:
o Fetch instructions
o Interpret instructions
o Fetch data
o Process data
o Write data

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CPU ORGANIZATION
• Most computers fall into one of the three types of CPU organizations:

i. Single Accumulator Organization: In this type of organization all operations are performed on an implied accumulator.
The instruction format uses only one address field.
For example, the instruction that loads the accumulator
with the contents of a memory location.

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SINGE ACCUMULATOR
ORGANIZATION
• The computers, present in the early days of computer history, had accumulator based CPUs. In this type
of CPU organization, the accumulator register is used implicitly for processing all instructions of a program
and store the results into the accumulator. The instruction format that is used by this CPU Organization
is One address field. Due to this the CPU is known as One Address Machine.
• The main points about Single Accumulator based CPU Organization are:
• In this CPU Organization, the first ALU operand is always stored into the Accumulator and the second
operand is present either in Registers or in the Memory.
• Accumulator is the default address thus after data manipulation the results are stored into the
accumulator.
• One address instruction is used in this type of organization.
• The format of instruction is: Opcode + Address Opcode indicates the type of operation to be performed.

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TYPES OF OPERATION
• Mainly two types of operation are performed in single accumulator based CPU organization:
1. Data transfer operation –
• In this type of operation, the data is transferred from a source to a destination.
• For ex: LOAD X, STORE Y Here LOAD is memory read operation that is data is transfer from memory to accumulator and
STORE is memory write operation that is data is transfer from accumulator to memory.
2. ALU operation –
• In this type of operation, arithmetic operations are performed on the data.
• For ex: MULT X where X is the address of the operand. The MULT instruction in this example performs the operation,
• AC <-- AC * M[X] AC is the Accumulator and M[X] is the memory word located at location X.
• This type of CPU organization is first used in PDP-8 processor and is used for process control and laboratory applications. It
has been totally replaced by the introduction of the new general register based CPU.

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ADVANTAGES AND DISADVANTAGES OF
SINGLE ACCUMULATOR ORGANIZATION
Advantages –
• One of the operands is always held by the accumulator register. This results in
short instructions and less memory space.
• Instruction cycle takes less time because it saves time in instruction fetching from
memory.
Disadvantages –
• When complex expressions are computed, program size increases due to the
usage of many short instructions to execute it. Thus memory size increases.
• As the number of instructions increases for a program, the execution time
increases.

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xx GENERAL REGISTER ORGANIZATION
In this organization, the instruction format needs 2 or 3 register address fields

according to the operation.


For example, an instruction for addition may be written as
• ADD R1, R2, R3,
• It denotes the operation R1 <—R2 -f- R3

xx

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xx TYPES OFGENERAL REGISTER
ORGANIZATION
• General register CPU organization of two type:
Register-memory reference architecture (CPU with less register)

– In this organization Source 1 is always required in register, source 2 can be present either in register or in memory. Here two
address instruction format is the compatible instruction format.

Register-register reference architecture(CPU with more register)


xx
– In this organization ALU operations are performed only on a register data. So operands are required in the register. After
manipulation result is also placed in register. Here three address instruction format is the compatible instruction format.

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xx
ADVANTAGES AND DISADVANTAGES OF GENERAL
REGISTER ORGANIZATION
The advantages of General register based CPU organization –
• Efficiency of CPU increases as there are large number of registers are used in this
organization.
• Less memory space is used to store the program since the instructions are written
in compact way.
The disadvantages of General register basedxx CPU organization –

• Care should be taken to avoid unnecessary usage of registers. Thus, compilers


need to be more intelligent in this aspect.
• Since large number of registers are used, thus extra cost is required in this
organization.

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HOMEWORK
Q1. Which registers can interact with the secondary storage?
A. MAR
B. PC
C. IR
D. R0
Q2. During the execution of a program which gets initialized first?
A. MDR
B. IR
C. PC
D. MAR
Answers:1.A,2.C

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REFERENCES
Reference Books:
1. J.P. Hayes, “Computer Architecture and Organization”, Third Edition.
2. Mano, M., “Computer System Architecture”, Third Edition, Prentice Hall.
3. Stallings, W., “Computer Organization and Architecture”, Eighth Edition, Pearson Education.
Text Books:
4. Carpinelli J.D,” Computer systems organization &Architecture”, Fourth Edition, Addison Wesley.
5. Patterson and Hennessy, “Computer Architecture” , Fifth Edition Morgaon Kauffman.
Reference Website
6. https://www.geeksforgeeks.org/computer-organization-and-architecture-tutorials/
7. https://www.slideshare.net/sangitavishwakarma1/cpu-organisation
8. https://upscfever.com/upsc-fever/en/gatecse/en-gatecse-chp159.html
9. https://dodiyahiten.files.wordpress.com/2012/09/chapter-7-central-processing-unit.pdf

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THANK YOU

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