Full Adder

Ci
Si
half-adder
Ai S C
half-adder C i+1
Bi
C

A full adder can be made from two half adders

(plus an OR gate).
 Full Adder
Putting it all together
• Single-bit full adder
• Common piece of computer hardware
Ai Bi

C i+1 Full Adder Ci

Si
Block Diagram
 Binary Parallel Adder (4-Bit Adder)
Chain single-bit adders together.
What does this do to delay?

A
3B3 A
2B2 A
1B1 A
0B0

Full Adder
Full Adder
Full Adder
Full Adde
0
C3 C2 C1

C
4 S
3 S
2 S
1 S
0

C 1 1 1 0
A 0 1 0 1
B 0 1 1 1
S 1 1 0 0
 The 4-bit Adder Subtractor 
performing both addition and subtraction

The circuit has a Mode switch that allows you to choose

between adding (M=0) and subtracting (M=1).

Binary addition :

Decimal numerals Binary numerals

  6    0110
+5 +0101
  11   1011
Binary subtraction:
we use 2’s complement to keep things simple.

Ex: to perform the operation (6-5) or (0110-0101),

we first obtain the 2’s complement of five and then
add it to six:

Step one: Getting the 2’s complement of 5

One’s Complement: 1010.
Two’s Complement: 1010 + 1 = 1011.

Step two: Adding the 2’s complement of 5 to 6:

 Decimal numerals Binary numerals
   6    0110
+(-5) +1011
   1   10001.

So how does the circuit know whether you want to add or

subtract? 

EX-OR Gate and the Mode switch

The circuit has a Mode switch that allows you to
choose between adding (M=0) and subtracting (M=1).
 INPUT OUTPUT
Mode [M] B M XOR B
0 0 0 [B]
0 1 1 [B]
1 0 1 [B’]
1 1 0 [B’]

So one input of each XOR gate is attached to the Mode

switch while the other input of each XOR gate is attached
to a B bit.

Mode signal also goes into the carry input of the least
significant full–adder (C0), Hence, when the M=1, the
XOR gates and the Mode switch take the 2’s complement
of B and pass it to the full–adders.
 4-bit Subtractor: E = 1
A3 B3 A2 B2 A1 B1 A0 B0

Full Adder Full Adder Full Adder Full Adder

C3 C2 C1
+1

C4 SD 3 SD 2 SD 1 SD 0

Add A to B’ (one’s complement) plus 1

That is, add A to two’s complement of B

D=A-B
Adder- Subtractor Circuit
 Overflow in two’s complement
addition
• Definition: When two values of the
same signs are added:
– Result won’t fit in the number of bits provided
– Result has the opposite sign.

AN-1
BN-1 Overflow?

CN-1

Assumes an N-bit adder, with bit N-1 the MSB

 Addition cases and overflow

00 01 11 10 00 11
0010 0011 1110 1101 0010 1110
0011 0110 1101 1010 1100 0100
-------- -------- -------- -------- -------- --------
0101 1001 1011 0111 1110 0010
2 3 -2 -3 2 -2
3 6 -3 -6 -4 4
5 -7 -5 7 -2 2
OFL OFL
 Summary
• Addition and subtraction are fundamental to
computer systems
• Key – create a single bit adder/subtractor
– Chain the single-bit hardware together to create bigger designs

• The approach is call ripple-carry addition

– Can be slow for large designs

• Overflow is an important issue for computers

– Processors often have hardware to detect overflow

• Next time: encoders/decoder.