Department of Electrical and computer Engineering

College of Engineering and Technology

Jimma University
CHAPTER 2.2
MEMORY SEGMENTATION AND
ADDRESSING MODE
 LECTURE OBJECTIVE
 Be familiar with the 8086
microprocessors architecture
General bus operation
Its memory segmentation
Addressing modes
ETC

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GENERAL FEATURE OF 8086
 8086 was introduced in 1978 G.C. by Intel.
 It is 40 pin dual in line packaged
 Use high-performance metal-oxide
semiconductor (HMOS) technology
 It has approximately 29,000 transistors
 It is a 16 bit microprocessor (16 bit word
length)
 It has 1MB of memory address space
 It has 14, 16 bit register sets

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 GENERAL BUS OPERATION

 The 8086 has a combined address and data bus

commonly referred to as a time multiplexed
address and
data bus.
 Basically, all the processor bus cycles consist of at
least 4 clock cycles referred to as T1, T2,T3 and
T4·
 The address is transmitted by the processor during
T1. It is present on the bus only for one cycle.
 During T2, i.e. the next cycle, the bus is tristated
for changing the direction of bus for the following
data read cycle.

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FEATURE 8086 MICROPROCESSOR

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 GENERAL BUS OPERATION
 The data transfer takes place during T3 and
T4. In case, an addressed device is slow and
shows 'NOT READY status the wait states T w
are inserted between T3 and T4.
 These clock states during wait period are
called idle states or wait states.
 The processor uses these cycles for internal
housekeeping.

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 GENERAL BUS OPERATION
 The address latch enable (ALE) signal is
emitted during T1, by the processor
(minimum mode) or the bus controller
(maximum mode) depending upon the status
of the MN/MX input.
 The negative edge of this ALE pulse is used
to separate the address and the data or
status information.

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 READ CYCLE BUS TIMING
DIAGRAM IN MINIMUM MODE

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 WRITE CYCLE BUS TIMING
DIAGRAM IN MINIMUM MODE

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 SEGMENTATION
 The address bus width is 20 bit wide
 But all its registers are 16 bit width
 For this reason it partition its 1mb memory into
16 64kb memory segment and access them
individually
 8086 allow only 4 active segments at a time
 For the selection of the four active segments we
use segment register
 Code segment register
 Data segment registers
 Stack segment register
 Extra segment registers

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 SEGMENTATION(CONTINUED)

 The code segment(CS) holds the

upper 16 bit address of the
instruction
 Stack segment(SS) holds the upper
16 bit address of the stack segment
 Data segment(DS) and extra
segment(ES) are used for holding
the upper 16 bit address of the
data segment
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 SEGMENTATION(CONTINUED)
 Advantage of segmentation
 It expands the addressing capacity of 8086 from
16 bit to 20 bit
 It allow the segments to have more than 16kb
memory size by having more than one segments
 It facilitate the separate memory area for
program, data, stack and extra segment
 Allow dynamic relocation

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 SEGMENTATION(CONTINUED)
 To generate the 20 bit physical address, the address adder
uses the segment register and offset register
 Specifically
 Physical address = segment register value *10h + offset
register

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GENERATION OF 20 BIT
ADDRESS
 8086 generate the required 20 bit address
from segment register and offset registers

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 ADDRESSING MODE
 What is addressing mode?
Addressing mode is how a processor bring
operand for its operation
 Generally in 8086 µP, there are many
types of addressing modes such as
Data addressing mode
Program memory addressing mode
Stack memory addressing mode
String addressing mode
I/O addressing mode
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 DATA ADDRESSING MODE

•In order to illustrate data addressing

mode we use the mov instruction set of
of 8086 processors e.g.
 REGISTER ADDRESSING
 It is the most common form of data addressing.
 Use the content of the registers as an operand
 As a Source or destination
 Note:- never mix an 8-bit \with a 16-bit register,
 IMMEDIATE ADDRESSING MODE
 Use immediate data (literal data) as a source

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 DIRECT ADDRESSING MODES
 Addressis formed by adding the displacement to the default
data segment address or an alternate segment address.
DIRECT ADDRESSING MODE

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REGISTER INDIRECT ADDRESSING
Allows data to be addressed at any memory location
through an offset address held in any of the following
registers: BP, BX, DI, and SI.
REGISTER INDIRECT

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 BASE-PLUS-INDEX ADDRESSING
 Similar to indirect addressing because it indirectly
addresses memory data.
 Are mostly used to access array element
 The base register often holds the beginning location of a
memory array.
 the index register holds the relative position
of an element in the array
 REGISTER RELATIVE ADDRESSING
Similar to base-plus-index addressing
 Datain a segment of memory are addressed by adding the
displacement to the contents of a base or an index register
(BP, BX, DI, or SI)
Example MOV AX,[BX+1000H]
BASE RELATIVE-PLUS-INDEX
ADDRESSING
 Similar to base-plus-index addressing.
 adds a displacement
 uses a base register and an index register to
form the memory address
 This type of addressing mode often addresses a two-
dimensional array of memory data.
 Example
 MOV AX,[BX + SI + 100H].
 displacement of 100H adds to BX and SI to form the offset
address within the data segment
BASE RELATIVE-PLUS-INDEX
ADDRESSING
TYPES OF DATA ADDRESSING
MODES

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ADDRESSING MODE GENERAL
FORMAT

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 OTHER ADDRESSING MODES
 String Addressing modes
Uses movs instead of mov
instruction
 Addressing mode for accessing I/O
ports
Use in and out instruction
 Program control addressing modes
Use jmp and call instruction
 Stack memory addressing modes
(push and pop)
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End!

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