Digital Logic Design

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DIGITAL LOGIC DESIGN


( CE_118 )

CHAPTER 0:
Overview
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Content
• Advance Sequential Logic

• Storage Components

• Register-Transfer Design

• Processor Design
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General Information
• Subject: Digital Logic Design
• Lecturer: Nguyen Thanh Sang
• Course meetings: 13h00 – 15h15, Wednesday, C.108
• Labs: 7.30 – 11.30, Saturday, A.213
• Assessment:
- Lab work: 25%
- Mid-term exam: 25%
- Final exam: 50%
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Book & Meterial

1. Lecturer slides

2. Principles of Digital Design, Daniel D. GAJSKI

3. Digital Systems: principles and applications (eighth

edition), Ronald J.Tocci.

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