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Unit 2
Unit 2
Unit 2
Topics
1.Introduction to h-parameters.
2.The hybrid model for 2-port network.
3.Transistor hybrid model, conversion formulas for the
parameters of the three transistor configuration.
4.Analysis of a transistor amplifier using h-parameters and
6.Analysis of a transistor amplifier using re model.
7.Relation between hybrid and re model
Operating Point
. The intersection of the load line with the V-I curve of BJT gives the
operating point for that BJT , referred to as the Q-point. The regions
of interest in a transistor are
IC
the amplifying region, cutoff region
Collector
and the saturation region. +
IC
V
CC Base
R +R + VCE
C E
IB
I CQ
Q
IB VBE
IE -
Emitter
VCQ V VCE
Q CC
Operating Point
When the transistor is biased in the active region it operates as an
amplifier. The biasing problem is that of establishing a constant DC
current in the emitter (or the collector) which is insensitive to
variations in temperature and so on. This is equivalent to designing
the transistor circuit so that the Q-point is in the middle of the DC
load line. Changing the biasing resistors has the effect of shifting the
Q-point along the DC load line, moving the transistor into the regions
of cutoff or saturation. The amplification property can be graphically
interpreted as in Fig. in next slide.
DC Analysis of BJTs
• DC voltages for the biased transistor:
• Collector voltage
VC = VCC - ICRC
• Base voltage
VB = VE + VBE
ac source of internal
resistance Rs coupled
to the base through C1
Load resistance
The coupling capacitors block dc and thus RL coupled to
prevent Rs and RL from changing the dc bias the collector
voltages at the base and collector. through C2
For the amplifier shown, notice that the voltage waveform is inverted
between the input Vband output Vce but has the same shape.
Amplifier Operation:
AC Load Line
Operation of the linear amplifier can be illustrated using an ac load line as
shown.
The ac load line is different than the dc load line because a capacitor
looks open to dc but effectively acts as a short to ac the collector resistor
RC appears to be in parallel with the load resistor RL.
Amplifier Operation:
Example: a) Determine the resulting peak-to-peak values of collector
current and collector-to-emitter voltage from the graph. b) What are the dc
Q-point values
a)
collector current varying
from 4 mA to 6 mA
collector current has peak-
to-peak value of 2 mA
(Ic = 2 mA)
And Vce = 1 V
b)
IBQ = 50 μA
ICQ = 5mA
VCEQ = 1.5V
INTRODUCTION:TRANSISTOR MODELING
12
Disadvantages
• Re model
• Fails to account the output impedance level of device and feedback effect
from output to input
• Hybrid equivalent model
• Limited to specified operating condition in order to obtain accurate result
13
DC supply • O/p coupling
“0” potential capacitor s/c
• Large values
•I/p coupling • Block DC and
capacitor s/c pass AC signal
• Large values
• Block DC and
pass AC signal • Bypass
capacitor s/c
Voltage-divider configuration
•Large values
under AC analysis
R1 RC
14
Modeling of
BJT begin
HERE!
15
AC bias analysis :
• Input impedance, Zi
• Output impedance, Zo
• Voltage gain, Av
• Current gain, Ai
19
For the system of Fig. Below, determine the level of
input impedance
1k Ω
+ Rsense +
Zi
VS=2mV Two-port
Vi=1.2mV
- system
-
20
Output Impedance, Zo (few ohms 2M)
21
For the system of Fig. below, determine the level of
output impedance
Rsense
Two-port + 20 k Ω
system +
Zo
V=1 V
Vs=0V Vo=680mV -
-
22
For the system of Fig. below, determine Zo if V=600mV,
Rsense=10k and Io=10A
Rsense
Rsource
+
Io +
Vs=0V Two-port Vo V
Zo
system -
-
23
Using the Zo obtained in example , determine IL for the
configuration of Fig below if
RL=2.2 k and Iamplifier=6 mA.
Iamplifier
IL
IRo
RL
Zo=Ro
24
Voltage Gain, AV
25
By referring the network below the analysis are:
Rsource
+ + +
Zi
VS AvNL Vo
Vi
-
- -
26
For the BJT amplifier of fig. below, determine: a)Vi b)
Ii c) Zi d) Avs
Rs
+ 1.2 kΩ + +
Zi BJT amplifier
VS=40mV AvNL=320 Vo=7.68V
Vi
-
- -
27
Current Gain, Ai
Io
Ai
Ii
28
Hybrid Equivalent Model
• re model is sensitive to the dc level of operation that result input
resistance vary with the dc operating point
• Hybrid model parameter are defined at an operating point that may
or may not reflect the actual operating point of the amplifier
29
Hybrid Equivalent Model
The hybrid parameters: hie, hre, hfe, hoe are developed and used to model the transistor.
These parameters can be found in a specification sheet for a transistor.
30
Determination of parameter
H22 is a conductance! 31
General h-Parameters for any
Transistor Configuration
hi = input resistance
hr = reverse transfer voltage ratio (Vi/Vo)
hf = forward transfer current ratio (Io/Ii)
ho = output conductance
32
Common emitter hybrid equivalent circuit
33
Common base hybrid equivalent circuit
34
Simplified General h-Parameter Model
The model can be simplified based on these approximations:
Simplified
35
Common-Emitter re vs. h-Parameter Model
hie = re
hfe =
hoe = 1/ro
36
Common-Emitter h-Parameters
37
Common-Base re vs. h-Parameter Model
hib = re
hfb = -
38
Common-Base h-Parameters
39
re TRANSISTOR MODEL
Common-Base Configuration
40
Therefore, the input impedance, Zi = re
that less than 50Ω.
For the output impedance, it will be as
follows;
Ie Ic
e c
isolation
re Ic α Ie part,
b b Zi=re Zo
common-base re equivalent cct 41
The common-base characteristics
42
43
44
For a common-base configuration in figure
below with IE=4mA, =0.98 and AC signal of 2mV is
applied between the base and emitter terminal:
a) Determine the Zi b) Calculate Av if RL=0.56k
c) Find Zo and Ai
45
Solution:
46
47
For a common-base configuration in previous
example with Ie=0.5mA, =0.98 and AC signal of 10mV is
applied, determine:
a) Zi b) Vo if RL=1.2k c) Av d)Ai e) Ib
48
Common-Emitter Configuration
Input Output
Base & Emitter terminal Collector & Emitter terminal
49
c
Ic
Ic Ib
Ib
b
e e
50
The output graph
51
Output impedance Zo
52
Ii=Ib BJT common-emitter Io Ic Ib
transistor amplifier Io
e c
+
+
Vi re Zo RL
Zi re Vo
-
- b b
53
Given =120 and IE(dc)=3.2mA for a common-
emitter configuration with ro= , determine:
54
Using the npn common-emitter configuration,
determine the following if =80, IE(dc)=2 mA and ro=40 k
a) Zi b) Ai if RL =1.2k c) Av if RL=1.2k
Ii=Ib
b c
Io
Ib
re ro RL
e
re model for the C-E transistor configuration
55
Important Links for problem practice and additional reading