2nm Semiconductor Technology

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2N

GUIDED BY – ASHWINI TULASGAONKAR MAM


Batch 3 members –
1. Nachiket Mahale
2. Raj Mali
3. Sanika Jadhav
4. Sagar Ingle
AGENDA
1. Moore’s Law
2. MOSFET
3. Drawback And Solution
4. FinFet technology
5. Advantages of FinFet technology
6. Challenges in FinFet technology
7. Gate all Around technology
8. Advantages of Gate all Around Technology
9. Comparison
10.Conclusion
MOORE’S LAW

• Currently after the 10 to 15 years of IC’s a observation was found that the number of transistors in
computer chips was increasing at an exponential rate of 2 or it doubles every year.

• Mathematically
total transistor= previous transistor*2;
MOSFET

• When gate electrode is energized an


electric field is established that
inverts the channel forming a
conductive pathway from source to
drain.

• However when the length of the


electrode is reduced the control of
the gate over the channel region is
also reduced this then results into
the lower transistor performance.
DRAWBACK AND SOLUTIONS

• So one drawback of MOSFETS is by shrinking the transistor’s size the gate length produces a significant
leakage current and below 28nm this leakage becomes excessive.
• At a hardware level when we see the number the transitors getting double , the size of the chip or the
computer also gets bigger to fit the number of transitors.
• And at a certain time the number of transistor will also not get intergrated on the chip i.e because of the size
factor.
• So there are two possible solutions to this that is by increasing the size of the chip or by changing the
architecture of transitors.
• For this the new architecture of FET was found FINFET
FINFET TECHNOLOGY

• FinFET is designed to address this performance


shortcoming by wrapping the gate electrode
around the channel instead of having it lay on
top of the channel as in the case of the classical
transitor in the FinFET architecture
• A thin fin of silicon as the channel and it is
encased by the gate electrode the source and
drain of those regions of the fin that are not
covered by the gate
FINFET TECHNOLOGY

• On the source drain regions consists of a null


doped silicon fin surrounded by an extension
implant and poly oxide

• The cutaway view reveals the FinFets internal


structure. We see the high K dielectric and the
metal gate.
FINFET TECHNOLOGY

• When the gate electrode is energized it now has


excellent control over the channel because it
surrounds the channel and the transistor and
the transistor width contains the three
components of the channel
FINFET TECHNOLOGY

• When gate electrode is energized the region of


the fin located beneath the electrode is inverted
and forms a conductive path way between the
source and the drain
• Although the thin FET is a fully depleted device
most of the conduction occurs along the outer
edges of the fin
FINFET TECHNOLOGY

• So FINFET technology comes into picture which is most promising device technology for extending
Moore’s
• Law all the way to 5nm .
• It offers excellent solutions to the problems of sub-threshold leakage, poor short-channel.
ADVANTAGES OF FINFET TECHNOLOGY

• Better control over the channel


• Suppressed short-channel effects
• Lower static leakage current
• Faster switching speed
• Higher drain current
• Lower switching voltage
• Low power consumption
CHALLENGES IN FINFET TECHNOLOGY

• We were achieving the performance boost and power reduction till 7nm using finfet technology
• However further reduction in finfet dimensions leads to limitations in the drive current and electrostatic
control.
• Although three sides of the fin are controlled by the gate, there remains one side that isn’t controlled.
• As the gate length is reduced it leads to greater short channel effects and more leakage through the
uncontacted bottom of the device and as a result smaller devices can’t meet power and performance
goals.
• So For This We have developed new architecture Gate All Around.
GATE ALL AROUND TECHNOLOGY

• It use stacked nanosheets


• These separate horizontal sheets are vertically
stacked so that the gate surrounds the channel
on all four sides, further reducing leakage and
increasing current.
• It workings are similar to FINFET.
ADVANTAGES OF GATE ALL AROUND
TECHNOLOGY

• Better control over the channel as gate is all around.


• Leakage current is almost negligible
• Effect of Short channel is very less.
• High drain current.
• Low subthreshold voltage.
COMPARISON
Differentiator MOSFET FINFET Gate all Around
points

structure Channel is below gate Channel is inside gate Channel is inside gate
electrode such that it is such that it is
surrounded by three surrounded by four
side of gate side of gate
Channel presence There’s no physical FINFET contains Gate all Around
channel physical channel contains physical
channel
range MOSFET’s are used in FINFET’s are used in GAA’s are used in
above 30nm between 5nm to 30nm below 5nm
microprocessors microprocessors microprocessors

channel There is virtual There’s a physical There’s a physical


channel created when channel fin added in channel called
gate electrode is FINFET nanosheets added in
charged GAA
CONCLUSION
• So from this seminar we have learned the evolution in the semiconductor technology ,Different
architecture's of semiconductor such Fin-Field Effect Transistor, Gate all around transistor
• We have learned collaboration ,how as a team we can successfully create the project’s very easily.
• We gained some stage daring and other softskills too.
THANK YOU

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