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Digital Logic Design: Lecture - 5
Digital Logic Design: Lecture - 5
Design
Lecture - 5
COMBINATIONAL
CIRCUITS
Page 262, 11th E
DLD by Dr. Muhammad Taha 2
Jilani
Chapter -
Combinational Logic 5
Analysis
• Basic Logic Circuits
– AND-OR Logic
• AND-OR logic produces an SOP
expression.
Equivalent POS
expression?
DLD by Dr. Muhammad Taha 3
Jilani
Implementing Combinational
Logic
•For every Boolean expression there is a logic circuit,
and for every logic circuit there a
is expression. Boolean
– From a Boolean Expression to a Logic
Circuit
X = AB + CDE
A
C X= AC + AB
A
B Negative-OR = NAND
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Summary
Combinational Logic Circuits
When the output of a SOP form is inverted, the circuit is
called an AND-OR-Invert circuit. The AOI configuration
lends itself to product-of-sums (POS) implementation.
An example of an AOI implementation is shown. The output
expression can be changed to a POS expression by applying
DeMorgan’s theorem twice.
A
B ABC
C X = ABC + DE X = ABC + DE AOI
D X = (ABC)(DE) DeMorgan
E DE X = (A + B + C)(D + E) POS
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Combinational Logic
Analysis
• Basic Logic Circuits
– AND-OR-Invert Logic
• If AND-OR logic produces an SOP expression. Its
invert,
i.e. the AND-OR-Invert logic can produce a POS
expression.
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Implementing Combinational
Logic
•Minimize this combinational logic circuit, using K-
Map
AND-OR NAND
Logic Logic
Expression simplification using
BOOLEAN rules and K-MAP
methods
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Seven Segment LED
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Seven Segment LED
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
BCD Decoder/Driver
The a-g
Another useful decoder is the 74LS47. This is a BCD-to- outputs
seven segment display with active LOW outputs. are
VCC designed
(16) for much
BCD/7-
seg BI/RBO
(4) higher
BI/RBO
(7) a
(13) current
1 (12)
(1)
2
b
(11)
than most
BCD
inputs
(2)
4
c
d
(10)
Output
s to
devices
(6)
8
e
(9) seven (hence the
(3) (15) segme
LT
(5)
LT f
(14) nt word
RBI RBI g device
driver in
(8)
74LS4 the
7
GND name).
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Seven Segment LED
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
BCD Decoder/Driver
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
BCD Decoder/Driver
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
BCD Decoder/Driver
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Summary
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
BCD Decoder/Driver Summary
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
BCD Decoder/Driver
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
BCD Decoder/Driver
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Summary
BCD Decoder/Driver
Trailing zero suppression blanks unnecessary trailing
zeros to the right of the decimal point as illustrated here.
The RBI input is connected to the BI/RBO output of the
following decoder.
0 1 0 1 0 1 1 1 0 0 0 0 0 0 0 0
1 0 0
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
•Let’s solve some more examples of
Combinational Logic Circuits.
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Example 1
• Design a logic circuit with four input variables (W, X,Y&Z). The
output of the circuit will be “High” only if it’s any two or more than
two of inputs are high.
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Example 2
• Design a Hexadecimal to 7-Segment Decoder which displays 0, 1,
2, 3, 4, 5, 6, 7, 8, 9, A, b, C, d, E & F.
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Example 3
• The bit combinations assigned to the BCD and excess-3 codes are
listed in following table.
• Don’t Care condition will be applicable on 10 to 15 input numbers.
• Steps needed. Truth Table for four variables, SOP simplification
through K map, Equation and diagram
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Example 4
• A committee of three individuals decide issues for an organization.
Each individual votes either yes or no for each proposal that arises.
A proposal is passed if it receives at least two yes votes. Design a
circuit that determines whether a proposal passes.
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Think some more?
• 2’s Complement?
• Table of 2 or any other number?
• Any more ideas from your side???
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Functions of
Combinational
• Logic
Applications of Combinational
Logic