The document contains 4 examples calculating memory sizes, page table sizes, number of bits that can store protection information, and effective memory access time given TLB hit ratios. The key details are:
1) A 22-bit address can access 223 bytes of memory.
2) A system with 32-bit addresses, 4KB pages, and 4-byte PTEs has a 4MB page table.
3) A system can use 14 bits for protection info in each 32-bit PTE given 30-bit physical addresses and 18-bit frame numbers.
4) A system with a 0.6 TLB hit ratio has an effective access time of 122ms.
The document contains 4 examples calculating memory sizes, page table sizes, number of bits that can store protection information, and effective memory access time given TLB hit ratios. The key details are:
1) A 22-bit address can access 223 bytes of memory.
2) A system with 32-bit addresses, 4KB pages, and 4-byte PTEs has a 4MB page table.
3) A system can use 14 bits for protection info in each 32-bit PTE given 30-bit physical addresses and 18-bit frame numbers.
4) A system with a 0.6 TLB hit ratio has an effective access time of 122ms.
The document contains 4 examples calculating memory sizes, page table sizes, number of bits that can store protection information, and effective memory access time given TLB hit ratios. The key details are:
1) A 22-bit address can access 223 bytes of memory.
2) A system with 32-bit addresses, 4KB pages, and 4-byte PTEs has a 4MB page table.
3) A system can use 14 bits for protection info in each 32-bit PTE given 30-bit physical addresses and 18-bit frame numbers.
4) A system with a 0.6 TLB hit ratio has an effective access time of 122ms.
Calculate the size of memory if its address consists
of 22 bits and the memory is 2-byte addressable.
• Thus, Size of memory • = 222 x 2 bytes • = 223 bytes Consider a system with byte-addressable memory, 32 bit logical addresses, 4 kilobyte page size and page table entries of 4 bytes each. The size of the page table in the system in megabytes is • Page table size • = Number of entries in page table x Page table entry size • = 220 x 4 bytes • = 4 MB In a virtual memory system, size of virtual address is 32-bit, size of physical address is 30-bit, page size is 4 Kbyte and size of each page table entry is 32-bit. The main memory is byte addressable. Which one of the following is the maximum number of bits that can be used for storing protection and other information in each page table entry? • Maximum number of bits that can be used for storing protection and other information • = Page table entry size – Number of bits in frame number • = 32 bits – 18 bits • = 14 bits Consider a paging hardware with a TLB. Assume that the entire page table and all the pages are in the physical memory. It takes 10 milliseconds to search the TLB and 80 milliseconds to access the physical memory. If the TLB hit ratio is 0.6, the effective • A. 120 memory access time (in milliseconds) is _________. B. 122 C. 124 D. 118