U18ECI6203 -

VLSI & HDL Programming

Module 2 – MOS Circuit Design Process

Threshold voltage & Body effect

UMA MAHESWARI V
Assistant Professor,
Department of Electronics & Communication Engineering,
Kumaraguru College of Technology.
 Threshold Voltage
Threshold voltage (Vt):
• The voltage at which an MOS device begins to conduct ("turn on")
• It is the applied Vgs to a MOS device, below which Ids effectively drops to zero.
• The threshold voltage is a function of following parameters called,
(1) Gate conductor material
(2) Gate insulator material
(3) Gate insulator thickness – channel doping
(4) Impurity at the silicon-insulator interface
(5) Voltage between the source and the substrate Vsb
(6) Absolute value of Vt, decreases with increase in temperature.
a. -4 mV/̊C – high substrate doping
b. -2 mV/̊C – low substrate doping
 Threshold Voltage Equations
The threshold voltage may be expressed as,

• Cox: the gate-oxide capacitance, which is inversely

proportional to the gate oxide thickness (tox).
• Qfc: the fixed charge due to surface states that arise due to
imperfections in the silicon-oxide interface and doping.
• φms: the work function difference between the gate material and
the silicon substrate.
 Threshold Voltage Equations (cont.)
Φms =-( +φb ) ≈ -0.9v - n-transistor
Φms = -( φb) ≈ -0.2v - p-transistor
• Vt varied by NA , COX , Qfc

• Two common techniques for the adjustment of Vt.

 Affecting Qfc by varying the doping concentration at the silicon-insulator interface

through ion implantation.
 Affecting Cox by using different insulating material for the gate. A layer of silicon
nitride (Si3N4) combined with a layer of silicon oxide can effectively increase the
relative permittivity of gate insulator from 3.9 to 6. For the same thickness dielectric
layer, C ox is larger using the combined material, which lowers V t
Body Effect
 Body Effect
• When connecting several devices in series as
shown in Figure 2.7, the source-to-substrate of
each individual devices may be different. For
example, Vsb2 > Vsb1 = 0.

• As Vsb (Vsource - Vsubstrate) is increased, the

density of the trapped carriers in the depletion
layer also increases. The overall effect is an
increase in the threshold voltage, Vt (Vt2 > Vt1).
 MOS DESIGN DC EQUATIONS
• Three MOS operating regions
(1) Cutoff or subthreshold region
Ids=0, Vgs ≤Vt
(2) Nonsaturation, linear or triode region
: 0<Vds<Vgs-Vt
: When Vds << Vgs-Vt

(3) Saturation region

: 0< Vgs-Vt<Vds

β= (W/L) Process Gain Factor

 Summary
• Threshold Voltage
Threshold voltage function
Threshold voltage equation
Threshold voltage adjustments
• Body Voltage
• MOS Design DC Equations
THANK YOU